Commit Graph

4 Commits

Author SHA1 Message Date
Tim Edwards e1783a42a9 Added a "DRC manager" window option. This allows DRC errors to be
categorized by error type and scrolled through conveniently.  However,
it needs work dealing with finding the actual error bounds.  The
"DRC count" counts tiles, which is tile-plane-geometry-specific, and
"DRC listall why" fractures errors both over tiles and over the square
areas that the interactive DRC splits the layout into, for performance.
The DRC error plane needs to be changed to hold different types for
each error class, so that errors can be scanned by boundary instead of
by tile (work to be done).
2019-11-15 10:26:04 -05:00
Tim Edwards 091d7ba2ae Corrected drcAssign for use with CIF drc rules, where the check for
plane is not relevant and can generate false-positive error messages
(although no actual errors occur).
2019-09-19 14:33:30 -04:00
Tim Edwards 005a4880a3 Modifed the DRC section of the techfile to add two additional
behaviors:  (1) An additional syntax for "widespacing" that allows
both the triggering metal's width AND run-length, which is typical
of rules in 65nm-and-below processes;  and (2) a new "option"
statement for the DRC section, with (for now) one possible flag
"wide-width-noninclusive", indicating that the metal width given
for "widespacing" rules means that a violation is only triggered
for material with a width greater than the given rule width (as
opposed to the default interpretation of a width greater than
or equal to the given rule width).
2018-09-19 17:04:13 -04:00
Tim Edwards 231a299b16 Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky 2017-04-25 08:41:48 -04:00