commit, mostly relating to the scale of values in the ".nodes" file
produced by ext2sim. Making this file CIF syntax seemed unnecessary,
so I removed the CIF syntax and scaling. "extresist" can now produce
an apparently valid output on a standard cell layout. Even with the
change, the extresist output is still only pseudo-hierarchical, so
this does not preclude the need for eliminating the .sim format file
in favor of the .ext file, but it provides a working intermediate
form.
not restored until after all cells have been processed through
extraction. Otherwise, top-down connections can end up with
different generated names for the same node, resulting in a
disconnect in the netlist.
statement in a .ext file require that all aliases of a node name be
rehashed after a node merge, or else node loops can occur. Also
prevented statements of the form "equiv A A" from being output in
the .ext file, as they are useless.
for the "equiv" statement---equivalent nodes names have to be
registered in the def->def_nodes hash table, and if they point to
the same node, then that node can't be free'd until the last
referenced node is seen when iterating through the hash table to
free the node records during EFDone(). This is handled by the
reference count.
circuits with nets having multiple conflicting labels, depending
on where the "equiv" statement occurs in the .ext file output.
Corrected the error but am still puzzled as to why this has never
shown up before, as it does not appear to be the result of any
recent development work.
The previous behavior was to generate hierarchical names for all
labels when copying contents of subcells. This is "safe" for
copying selections without accidentally shorting things through
labeling, but it can make a mess of the selection. Options are
now "select do labels" for the existing behavior, "select no labels"
to not show any labels, and "select simple labels" to show only the
root name of labels in subcells.
SPICE netlist output that appears to have come from flags created
for writing DEF that inappropriately got set during ext2spice.
A redundant call to efAddNodes() was adding confusion by appearing
to handle most cases but actually missing some. With the corrected
flag, the redundant call is really redundant and can be removed.
It has not been tested whether DEF output is affected by the change
(DEF output from magic is rarely used, anyway).
This reverts commit 46baae0ce6.
Reverting the last commit, as it does not work completely the way it
is supposed to, and will most likely have to be done in a different
way.
array delimiters and hierarchy separators (characters '/', '[', and ']')
that are part of instances or labels passed to magic, are preserved
from input to output, but internally marked (with a backslash escape)
so that they are not misinterpreted my magic when running ext2spice.
that have been removed by flattening into the parent cell due to lack
of devices. Previously the checks on writing the subcircuit and writing
the call were slightly different, leading to instances in which the
subcircuit call would be written to the netlist output without the
subcircuit being defined. (2) Corrected an error in the "bridge" CIF/GDS
output operator. In certain (somewhat rare) geometries, the tile behind
(instead of in front of) the corner being checked may be incorrectly
flagged as a DRC spacing error. The fix is to ignore tiles that are
behind the corner being checked.
extflat code; failure to provide a forward external reference
to EFHNBest() resulted in a failure to correctly evaluate a
boolean expression. That resulted in a failure to merge
hierarchical nodes during ext2spice, resulting in an incorrect
netlist with single nodes broken up into pieces.
port labels that are unnattached ("attached" to space), or possibly
sticky labels without any geometry underneath, end up with a NULL
node during EFBuild().
could cause serious errors on systems that do not auto-zero allocated
memory. Also: Fixed an error introduced by a recent commit to allocate
character memory for efReadLine() which frees the memory before reading
a .res.ext file, causing a crash when using "ext2spice" with the
"extresist on" option.
memory for the input line instead of using a fixed 1024-character
buffer. That avoids the issue of rare but possible overflow when
reading a .ext file with unknown line lengths.
a truncated line. There is still a question as to why an example
occurred that caused a line to be truncated, and whether a buffer
size needs to be made larger or made dynamically allocated.
change from passing the HierName to passing the HierContext (of which
HierName is a part) so that more information from HierContext (such
as the cell use being visited) can be passed to the callback
procedure (largely for diagnostic purposes).
argument as a pointer but also set the same variable to the
return value. This is ambiguous, because the behavior depends on
whether the value being set upon return is the original value or
the reallocated value. The result is system-dependent behavior.
or more repeated "equiv" lines in a .ext file. This implies two
ports with different names are connected, indicating probably a bad
layout, but that's not a reason to have magic crash.
not copy labels; not copying labels speeds up the antenna checks
(which don't need labels) greatly. Also fixed several numerical
overflow problems in the antenna checks, which resulted in false
positive errors, as well as nonsensical results.
than one name, because in that case one of the port records ends
up with a null pointer to a node, and causes a crash condition.
This can happen inadvertently, as when a connected node is not
specifically designated a port, but is forced to be a port
because of the connection.
extraction: Fixed a problem causing long extraction times, at
least some of which had to do with a poor string hash function
implementation. Fixed a huge problem in ext2spice, where the
node merge function was particularly poorly implemented, causing
exponentially increasing processing times with layout size.
Corrected a minor issue with ext2spice where arguments were
improperly specified, causing unnecessary error messages to be
issued. Fixed an error in the "load -dereference" command option,
which again caused unnecessary error messages to be issued.
Changed .gitignore to ignore Depend files, which are now regenerated
on every build.
views. Because the abstract view does not necessarily represent
actual connectivity, rely on the port indexes in the .ext file
to determine the number of ports and port order. Do not use
SpiceNodeName() to look up the node name, or unique ports that
are deemed shorted will go missing. Also: Modified the read-in
of .ext files so that use names may contain backslashes. Only
backslashes that end a line will be handled differently.
the right argument type (float, not int). Otherwise all resistances
from extresist come out zero when doing "ext2spice extresist on"
and "ext2spice hierarchy on". Also changed the format of the resistance
in the SPICE output to type float, since values are in standard units of
ohms, and rounding to the nearest ohm seems excessively coarse-grained.
a long-standing error (introduced with the "extresist geometry"
option) that can cause nets not to be extracted (due to the first
record not having extraction data, which was itself a long-standing
error in the code but which was not fixed correctly); (2) handle
"device mosfet" type transistors (previously only handled the old
"fet" type extraction devices); and (3) correct for the res.ext
file having a different scalefactor relative to the .ext file. The
latter item was solved by forcing all input to scale like
ExtCurStyle->exts_unitsPerLambda, locally correcting all input as
needed. Note that extresist still needs to handle other extraction
devices (e.g., resistors and capacitors) but those will require
additional handling in the routines which analyze the current path
to determine how to break up wires into paths.
include (1) specification of sidewall or surface to use for
each type individually, rather than a single method for all
types, and (2) specification of a linear model R = Ax + B for
the ratio limit when diodes are attached to the wire, where x
is the diode surface area (unitless, as this is a ratio).
remove redundant ports. A comment that I left in the code at the
last commit asked if it was necessary to call efAddNodes and
efAddConns recursively. An example came up in which the answer
is apparently "yes". These routines have been replaced by
efFlatNodes(), which appears to solve the problem. There is now
a question of whether efFlatNodesDeviceless() does anything, and
should its main behavior (to flag deviceless subcircuits) be
folded into efFlatNodes.
rid of redundant port entries in subcircuits. There is still an outstanding
issue as to whether nodes and connections need to be recursively iterated
to the hierarchy bottom. The current fix corrected the test case. Also,
added a "-dereference" option to the "load" command to revert to the
original behavior of using only search paths from "addpath" when searching
for files to load.
ports, to avoid creating ports for node names that are redundant.
It would probably be better to avoid creating the redundant node
names in the first place; however, I am less certain why these
are generated. The incorrect additional ports all have hierarchical
names in the cell, which is a sign that they are incorrect, as the
cell itself should not have any parents. The level of certainty
about this fix is definitely not 100%, but it was tested on a
hierarchical analog design, and setting levels of parasitic caps
caused new nodes to appear in subcircuits and in no cases did
information appear to be lost.
with ext2spice without the hierarchy option. More work needed to
produce correct hierarchical output and to support extraction
devices other than the old "fet" record.
the below-threshold coupling caps being removed from the hierarchy,
added code to suppress the error message when it is clearly related
to a below-threshold cap that has been removed.
checks. Added new command "antennacheck" and a routine that
adds feedback entries where violations are found. Extended the
syntax of the extraction section of the techfile to support the
antenna ratios and antenna calculation methods.
simple FET device in extresist. Also: Extended the bloat-all CIF operator
again, allowing the trigger layer for the bloat operation to include both
CIF layers and magic layers (previously only magic layers were supported).
This extension is possible due to the previous extension allowing the
trigger layer and bloating layers to be on separate planes. This operator
extension is useful for tagging geometry that is in the proximity of, but
not overlapping, geometry on another plane.
use name (not part of an array in magic). This was failing in
ext2spice due to code in extflat dealing incorrectly with the
array delimiters. The correction fixes the problem but leaves
the possibility that there could be a conflict between a use
name that is an array and a use name that has the array index
as part of the name.
while reading DEF. To preserve names as much as possible, such
names are now kept. To avoid problems, EFbuild.c and ext2hier
behavior has been changed to only parse entries in a .ext file as
instance arrays if the array notation follows the specific syntax
of [ax:bx:cx][ay:by:cy], letting all other uses of brackets pass
through unaffected.
64 because I overran the 64 array with too many resistclasses in
a techfile. This really should be dynamically allocated; this
requires parsing the line to count tokens and reallocating as
needed (to be done).
a scaling issue in extract) which was caused by the addition of
hierarchical netlist generation. Finding hierarchical connections
requires finding instances by name, so it is vastly better to create a
hash table of instances instead of a linked list.
added a long time ago, since capacitors use a different method for
calculating width and length than either transistors or resistors,
so subcircuits need a special class designator or else the extraction
may calculate the wrong dimensions for device width by totalling the
perimeter between the device and terminal types, as it would for a
MOSFET.