extFindNodes() does; consequently, ExtLabelRegions() when called
after ExtFindRegions() may accidentally chain together a substrate
region with whatever was left in this linked list after the
previous call to extFindNodes(), with unpredictable results.
linking it to Tk or X11 graphics. Added new command "display" which
returns the display type, which is good for finding out if the
display is "NULL". Added code to allow the wrapper to be defined
for NULL graphics with the Tk console, the main necessities of which
are to remove the "openwrapper" command, and to return immediately
from a number of tag callback functions.
in github issue #149. This causes magic to no longer write log files
for "make" and "make install" but will properly exit with a non-zero
return code on any error during compile.
Also: Corrected the command "tech drc surround <type1> <type2>" so
that it now returns the correct value when <type1> and <type2> are in
the same plane. Added new command "tech drc directional <type1> <type2>"
which works the same way as "tech drc surround" except for directional
surround rules. Used this to generate vias from "def write" with the
correct metal surround amounts included in the via definiton. The
route analysis then ignores tile slivers that make up the surrounding
material around contacts. Also implemented a method that handles
routes that are made of multiple thin tiles due to the maximum horizontal
stripes rule. Now magic handles "def write" well except for not dealing
with non-minimum-width routes unless they're specifically called out as
"special" nets.
is specified in the extraction section of the techfile, then magic
will compute the effect of a nearby shape partially shielding the
sidewall overlap capacitance, which approaches 100% shielding as
the shapes converge to zero separation. This method prevents
magic from vastly overestimating the fringe capacitance of closely
spaced wires, which was magic's worst problem with parasitic
accuracy. The "fringeshieldhalo" value is the distance at which
the fringe shielding becomes negligible. Typically, it will be
about three times the distance at which half the fringe value is
shielded. It may be necessary at some point to make both the
fringe shielding halo and the sidewall halo values per-type values
(or per-plane, at least). For now, it should suffice to bring
Magic's parasitic extraction back in line with other tools.
the name of the cell use if the cell use is a top level window. It
was accidentally discovered that using "select top cell ; select flat"
will do this (creating label text with spaces in the process, which is
illegal syntax for netlists).
not be seen during hierarchical processing, causing the substrate
to get split into several names that may conflict in the netlist.
At issue is the fact that ExtLabelRegions() will not attach a
default substrate label to a default substrate region. This may
need further untangling, as extFindNodes() will set the default
substrate node and is sometimes followed by ExtLabelRegions(),
which will label it. Any place ExtFindRegions() is called, this
could be an issue.
number from the git repository, which is overall more reliable than
the version number, but mainly to support a common method across the
open source tools for providing information to builds like open_pdks
that may need to know what version of every tool was used for the
build.
Most of this had to do with the incorrect use of the parent's substrate
name in extHierSubstrate(). After the correction, there still remains
an issue that is caused when a labeled isolated substrate region overlaps
an extraction tile boundary. I believe that this particular error has
existed for some time and is not new, so I am committing these changes.
a routine that should have been called with a NULL argument, but
instead was called with no argument, making the behavior system-
dependent. Revised the parsing of the "defaultareacap" and
"defaultperimeter" statements in the tech file, such that the short
version of both statements gets automatic handling of the substrate
and isolated substrate areas; this goes back to the recent change
in extraction behavior to redefine the "substrate type" (e.g., pwell)
during extraction as defining isolated substrate areas, and not the
default substrate. The earlier code change dealt with problems
related to extracting nodes and regions, but did not consider how
parasitic capacitance was affected. This commit resolves that issue.
The extSubtree() routine cuts a layout into squares and extracts
each separately, checking for subcell interactions. In each
square it parses all labels looking for unconnected ones. This
section of code not only parses all labels M x N times, but it
then marks interaction areas where there may be none, forcing
additional unnecessary processing. This commit makes the first
quick optimization, which is to change the return value of
DRCFindInteractions() from boolean to integer, allowing it to
return a value indicating that there are no subcells in the
area. This prevents the loop through labels from happening in
cases where there can never be interactions. More to come.
check for abstract views to determine how to handle the substrate
node. Running tests to check if this has any negative impact on
the extraction of abstract views that do not specify substrate
and well types.
traditionally been kept for backwards compatibility. However, the
operation of "ext2spice" and "ext2sim" as separate programs has
become extremely difficult to maintain, and so it has been dropped
in favor of folding both into the program as commands, as was done
a long time ago in the Tcl/Tk version.
cell properties in natural sort order when writing a .mag file.
This should remove the last bit of indeterminism in the output
of magic database files.
the label to be attached to a non-contact type when the label is
actually over a contact are not handled correctly when checking if
multiple labels should belong to the same port record.
timestamps that are fixed, since the timestamp update routine is
called from too many places, too many times. Instead created a
new cell definition flag indicating a fixed timestamp, which can
be set by "cellname timestamp" for an individual cell, or with
"gds datestamp" for cells read from a GDS file.
"gds datestamp <value>" as an option to force a specific datestamp
on the GDS output. This is a third option beyond the previous two
which were either to use the current time or to write zero. The
new option allows an entire library to get a common timestamp, for
example, related to a PDK version number. The "gds nodatestamp"
option has been retained for backwards compatibility.
in a cell to account for the difference between what's in an input
GDS file and what magic would write out itself from the processed
data. This potentially allows library cells to be read in that
will generate the equivalent mask data as output without resorting
to using GDS file references as properties. The method is activated
with the new command option "gds maskhints on" and the default is
off.
If cells are instanced before being defined, causing the GDS parser
to rewind the cell from the top, then the "already defined" error
messages will be suppressed, since it is to be expected that cells
will be seen twice (and ignored the 2nd time). When rewinding, an
output message is issued so that it is clear that the file contains
instances that are used before they are defined, and recommends the
"gds ordering on" setting. Also: Fixed the "gds ordering" command
code so that the command with no third argument returns the state
of the "gds ordering" setting instead of generating a parser error.
node representing the global substrate on cells that are abstract
views. Corrected a typecasting issue in ext2spice.c that throws
a compiler warning. Added another check for a cell being editable
when painting, which is a case that was not covered by the
previous code change to address the same issue.
Implemented a separate check for ports when writing a subcircuit
that cross-checks against the port list in the flattened
extraction. This allows ports that were optimized out during
flattening of the hierarchy to be removed from the cell's port
list, which cuts down on disconnected nodes in the output port
list.
tracing the short path back through stacked contacts. Discovered
a problem with the connectivity search routine (which has been in
the code for a very long time) which will fail to copy contacts
to the selection cell if it has already drawn one of the metal
layers in the same place. This has now been fixed.
stops checking for the "best" path during the feed-forward check
and only enumerates the cost function for every tile in the
selection, moving outward from the source. This keeps the
algorithm efficient.
there was no distinction between a locked file and a new cell
(initial state) before writing to disk. This prevents any new cell
from being saved! Also: Revised the behavior of the "select short"
search, but this still has issues with long run-times on complex
layouts, so this is an ongoing effort.
"defaultareacap" and "defaultperimeter" statements in the technology
file. Now, the parser makes use of the configuration of the
substrate from the "substrate" line to generate a default list of
which types and planes represent the substrate, and which types and
planes represent shielding to the substrate. This solves an issue
with the use of substrate isolation layers (e.g., "isosub" in
sky130A), because its definition and usage created substrate shields
on two planes (well and dwell), while the syntax for "defaultareacap"
and "defaultperimeter" only allow one shielding plane to be defined.
that makes a net a global net if there is a Tcl variable of the
same name. This conflicts with a later use of Tcl variables VDD
and GND to denote power and ground names, which is a completely
different usage.
value 1 after finding a substrate connecting type shielded (by deep
nwell, in the example) from the substrate, thus preventing the
search from processing any remaining substrate types. Solved by
changing the return value to zero to keep the search going.
record to the label structure to hold the port number. One major
issue stemming from this was reported in github issue #203 by Anton
Blanchard. This commit fixes that error.
output for transistors. The problem came from a change made to
fix an issue with capacitors marked as floating nodes because some
nodes are not output as source or drain. But those nodes are output
before the parameters, so when generating parameter output, all
nodes appear to have already been output. Solution: Specify an
additional bit in the "visited" mask for the node having been output
that is separate from the mask for resist classes used by the code
that writes parameter values, and use that bit as a test for whether
the node is connected to some device (not necessarily a FET source
or drain).
used by "topVisit" and "subcktVisit" in ext2spice.c, probably
caused by having different names on the same port number, the
subcktVisit() routine was modified to use exactly the same
enumeration as topVisit() so that they are guaranteed to have
the same result.
this limited ports to 16384, which seemed reasonable at the time.
However, the sky130_sram_macro layouts connect power and ground in a
way that when coupled with "extract unique" can generate tens of
thousands of ports and overrun the bit field, showing that automation
can do the unexpected. The solution was to split out the port number
from the label record as its own 32-bit value.
have already been output; i.e., that have EF_PORT set. However,
since EF_PORT is now set on all implicit ports, it is likely that
this part of the code is no longer exercised at all, and may be
removed.
connections through the substrate as the same node, and so will
not force different nodes names on the soft connection to be
unique. This should probably be selectable behavior. However, as
written, the "extract" command will always merge soft connections,
so giving them unique names just causes problems with "extract".
issue at the change made in revision 214. This was done incorrectly
in two ways, one being a set of statements inside an if() block that
should have been executed always, and the other an incorrect use of
the EF_DEVTERM flag, setting it when it should not have been set.
implicit substrate connections under some conditions were not added
to the subcircuit pin list. When this was corrected, the call to
the subcircuit was missing the implicit substrate port. When that
was corrected, the implicit substrate port printed was the subcircuit's
local node name, not the connection from above in the hierarchy. The
underlying problem was that the substrate was marked as a port in a
node record that was in another (flattened and unused) def and so not
seen when enumerating the def's node list. It's possible that the
better solution is that the efNodeHashTable() should be enumerated to
write subcircuit ports, not def->def_nodes. However, now, by using
EFHNLook(), the corresponding entry in efNodeHashTable() is found and
used.
work around the issue of loading a file containing references to
cells with the same name as cells already loaded. This is probably
going to cause additional headaches until a proper checksum method
is implemented.
behave as one would expect; e.g., "cellname self" returns the name
of the currently edited cell if nothing is selected; "cellname
rename <name>" renames the currently edited cell to <name>.
Modified the "extract" command so that it will not extract a cell
named "(UNNAMED)" but will insist that the cell must be given a
proper name, much like the "writeall" command does.
rectangle. Likewise, this also fixes an unexpected result when
doing "spliterase" on a zero-area rectangle (which does not cause
a segfault, but is not what one would want magic to do).
when reading in a .mag file. The routine was not checking for
whether a "use" entry in the file was the first one encountered
or not. The path is only ever given for the first use of any cell
def, so for any cell after the first, the path should have already
been resolved. This fix avoids lots of unnecessary error messages
when reading a file in a different directory. Also, because the
routine now checks for the first use in a file, any error messages
that do occur will only be displayed for the first use, not all of
them.
statements, with all "hard" connections being enumerated in the
same PORT entry, and "soft" connections (same label on unconnected
areas; e.g., through substrate or resistor device) being
enumerated as separate PORT entries, per the LEF spec. Also
corrected behavior with respect to the "lef write -toplayer"
option, which was treating each port label independently, and so
generating entries for lower layers of a port if there were ports
on those layers, in contravention to the "-toplayer" option.
Also: Added the PINS section to the "def write" output; this had
been left as a "to be completed" item but was never done in spite
of being easy to add.
entries for "floating" labels. Otherwise it is possible for the
hierarchical checks to find the label in flattened geometry and
reference it, resulting in merge statements in an .ext file that
reference undeclared nodes, ultimately resulting in extflat
failing to perform the merge, and an incorrect netlist.
to not get into the subcircuit port list during ext2spice. The new
fix brings back (unfortunately) the behavior of creating a substrate
node for cells that have no substrate connection to any device;
this will have to be handled separately.
solution; it would be much better to make the value adjustible, but
the array of tiles sized to LAYERS_PER_CONTACT is a Region structure,
and the routine that frees the Region structures does not have a way
to call a routine to take additional measures like free'ing a sub-
structure of the Region. A proper solution will require some work.
commands on selections in a cell that is not editable. Moves
and Copies were already handled correctly; this correction fixes
Delete and transforms (e.g., rotates and flips).
messages which was traced to code that changes a drivepoint position
to match a label; the same drivepoint may be part of the record for
the initial position to search on the net, in which case if the
position is changed, then the tile type needs to be changed to match
the new position.
using qsort() instead of its own linked-list-based sorting, which
is horribly inefficient. This change allows power nets (which
tend to be connected to all transistors) to be extracted in a
reasonable amount of time (hours instead of days).
an optional extra argument to the "select" command that can be used
to select labels by glob-style matching; e.g., "select area labels
VSS*" or "select less area labels *_1". This will help in managing
labels after flattening a standard cell design; e.g., by using
"select less area labels */VDD".
to eliminate all redundant names resulting from redundant labels.
Changed the behavior of "goto" so that it will find local names with
slashes, which are the result of using "flatten". A hierarchical
search is done first, as before, but on failure to find a subcell
component, the local cell is searched for the verbatim name.
specific nets to extract, rather than excluding them. That allows
"extresist" to target specific nets like the power supply or a clock
tree for extraction.
wrong, and it needs revisiting. This is the cause of a number of
negative capacitances appearing in the netlist (even after accounting
for overlap with subcircuits).
all geometry will be handled; the previous behavior expected only
a single rectangle per pin and so would only acknowledge the last
entry in any list of rectangles for the pin.
actually an issue and probably never relevant. extresist now works
except for substrate connections and soft connections between substrate
regions. That will require additional coding, not bugfixing, so I'm
committing the last of this set of bugfixes before starting that.
"ext2sim extresist on", which was being shared; that leads to
confusion, especially when using "ext2sim" to generate a node
name input file for "extresist". Also: Added a warning when two
ports are merged in a .ext file, as this can lead to numerous
incorrect entries in netlist output.
text formatting. Made one critical correction to ResGetDevice() to
pass the device type; otherwise, devices on different planes (e.g.,
MiM caps) with the same coordinate will always return the device on
the lowest plane, leading to incorrect results and an eventual crash
when the device record is free'd twice.
support of devices with terminals on different plances, such as
capacitors, diodes, and bipolar transistors. Output now appears
to give meaningful results for flattened layouts, although
numerous issues remain for hierarchical layouts.
to be scaled twice when using the "extract style" command and with an
extraction style that uses micron units. The microns-to-internal
units conversion expects an unscaled result when calling
CIFGetOutputScale(), but except when loading a tech file for the
first time, this value is scaled, and causes the double scaling.
Fixed by unscaling the CIF output before reloading the extraction
style, then scaling it afterward.
to copy up errors from non-interacting subcells. The routine was
only copying up TT_ERROR_P type errors, but for deep hierarchies,
TT_ERROR_S type errors may have to be propagated up as well.
require that an edit cell be defined. This stops a lot of commands
from failing on non-writeable cells. There really should not be a
concept of "non-editable" cells at all, just non-writeable ones.
"|"), pointed out by Jim Everitt. The error is pretty major, but
because the section of code it affects is just eliminating
unnecessary DRC rules, I believe that the only effect is that the
DRC ruleset ends up using more memory than it needs to. But, good
to have fixed.
it is easy to subvert the process by updating GDS without updating
the pointers, it is trivial to end up with bad GDS output. The
sanity checks confirm that the position pointed to is a complete
structure (check begin and end records), and that it has the same
name as the cell (this is not a requirement, as there are reasons
one might want to point to data from a structure of a different
name, but a warning will be printed).
that can be used to force renaming of a read-only cell. The
action revokes the read-only status of the cell and removes any
GDS filename and pointers from the cell's properties. This can be
used to swap out a library cell in a layout for a custom version,
by first forcing a rename of the cell, and then resetting the
filepath of the cell and flushing.
tile corners in the check area to find areas needing bridges.
This prevents generation of unnecessary bridging geometry; and
since the error made the check rotation-dependent, this may
resolve some "parent and child disagree on CIF" errors.
necessarily a 1:1 correspondence from tile types to extracted
device names, and not necessarily a 1:1 correspondence in the other
direction, either. So the search for devices at the location given
by the .sim file has been loosened to look for any tile type at that
location. Matches are restricted to those in which the plane of the
type found is the same as the plane of the device recorded in the .sim
file; this prevents matching device like MiM caps that may be in the
same location as a device in another plane.
very long time but never discovered; in which any implicit port
connection into a subcell (that is otherwise labeled with ports) that
appears at the end of the node list (i.e., after all the declared
ports), will not be output, either in the subcircuit definition or
calls.
Tim Edwards