I understand the problem, which is that nodes are ordered according
to precedence of EFHNBest() within a circuit, but there is no
concept of ordering between circuits. So ports end up listing nodes
in arbitrary order, and the only way to resolve the order is to use
EFHNBest() as is done within a subcircuit. Appears to work for
different edge cases tested.
ports, to avoid creating ports for node names that are redundant.
It would probably be better to avoid creating the redundant node
names in the first place; however, I am less certain why these
are generated. The incorrect additional ports all have hierarchical
names in the cell, which is a sign that they are incorrect, as the
cell itself should not have any parents. The level of certainty
about this fix is definitely not 100%, but it was tested on a
hierarchical analog design, and setting levels of parasitic caps
caused new nodes to appear in subcircuits and in no cases did
information appear to be lost.
used with "ext2spice hierarchy on" because the device index is not
reset between calls to output cells in the hierarchy, leading to
a mismatch of the index for all cells after the first one output.
device type so that it is now properly backwards compatible with
the old-style "fet" records. Also corrected the record matching
such that it properly matches according to the number of terminals
while allowing the traditional interpretation that there may be
fewer S/D type records than terminals if the S/D types are the
same for all terminals.
the compiler. Some are obscure functions (plot verstatec hasn't
been used in years) but others (like SPICE distributed junctions)
are potentially significant sources of unexpected crashes on
systems that don't zero uninitialized memory.
64 because I overran the 64 array with too many resistclasses in
a techfile. This really should be dynamically allocated; this
requires parsing the line to count tokens and reallocating as
needed (to be done).
name-to-number mapping used for the HSPICE format between
subcircuits. Otherwise, subcircuits with the same instance ID
remain in the table and may cause nodes to be output with a name
that collides with other names in the same subcircuit. This only
affects output in HSPICE format.
all the settings normally used for LVS (hierarchy on, cthresh
infinite, subcircuit top auto, etc.). (2) Extract and extract
unique ignore cells marked as abstract views (property LEFview
is set) when checking for unconnected nets with the same name
label.
added a long time ago, since capacitors use a different method for
calculating width and length than either transistors or resistors,
so subcircuits need a special class designator or else the extraction
may calculate the wrong dimensions for device width by totalling the
perimeter between the device and terminal types, as it would for a
MOSFET.
cause a crash. Corrected the implementation as well as implemented
an option for "subcircuit top auto" that generates a subcircuit
header or not depending on the presence or absense of ports in the
top level cell.
development had been halted since it was first created back in April.
Version 8.2 is now the official development version, with the first
development push to create a Cairo graphics interface.
Tim Edwards