Modified the behavior of "gds write" to refuse to write out the
magic database derived layout of a cell that declares GDS_FILE but for which the GDS file referenced cannot be found or read. This will produce an incomplete GDS file instead of an apparently good and complete GDS file that actually contains bad data. Also: Added new command "random" that allows a random seed to be set, for use with the GDS output when writing a full dump of a GDS file. Otherwise, the output prefixes are always the same, which defeats the purpose of adding the random prefix.
This commit is contained in:
Tim Edwards
parent
8428dcda1b
commit
e7e01a635f
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@ -817,7 +817,7 @@ calmaProcessDef(def, outf, do_library)
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* not already been output. Numbers are assigned to the subcells
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* as they are output.
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*/
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(void) DBCellEnum(def, calmaProcessUse, (ClientData) outf);
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if (DBCellEnum(def, calmaProcessUse, (ClientData) outf) != 0) return 1;
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if (isReadOnly && hasContent)
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{
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@ -838,13 +838,20 @@ calmaProcessDef(def, outf, do_library)
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DBPropGet((def->cd_parents->cu_parent == NULL) ? def :
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def->cd_parents->cu_parent, "GDS_FILE", &isReadOnly);
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if (!isReadOnly || isAbstract)
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TxError("Calma output error: Can't find GDS file \"%s\" "
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"for vendor cell \"%s\". Using magic's "
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"internal definition\n", filename,
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def->cd_name);
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if (isReadOnly)
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{
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def->cd_flags |= CDVENDORGDS;
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return 0; /* Ignore without raising an error */
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}
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TxError("Calma output error: Can't find GDS file \"%s\" "
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"for vendor cell \"%s\". It will not be output.\n",
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filename, def->cd_name);
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if (CalmaAllowUndefined)
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return 0;
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else
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return 1;
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}
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else if (isAbstract || (!hasGDSEnd))
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{
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@ -936,7 +943,7 @@ calmaProcessDef(def, outf, do_library)
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if (!do_library)
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calmaOutFunc(def, outf, &TiPlaneRect);
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return (0);
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return 0;
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}
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@ -24,6 +24,7 @@ static char rcsid[] __attribute__ ((unused)) = "$Header: /usr/cvsroot/magic-8.0/
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <time.h>
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#include "tcltk/tclmagic.h"
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#include "utils/magic.h"
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@ -53,6 +54,61 @@ static char rcsid[] __attribute__ ((unused)) = "$Header: /usr/cvsroot/magic-8.0/
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extern void DisplayWindow();
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/*
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* ----------------------------------------------------------------------------
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*
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* CmdRandom
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*
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* Generate a random integer or set the random seed. This is mainly
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* used for seeding the random number generator for the GDS write
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* routine when GDS write is assigning a random prefix to ensure
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* uniqueness of names in a GDS library read from a file instead of
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* generated from the database.
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*
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* Results:
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* None.
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*
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* Side effects:
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* None.
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*
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* ----------------------------------------------------------------------------
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*/
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void
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CmdRandom(w, cmd)
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MagWindow *w;
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TxCommand *cmd;
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{
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int value;
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if (cmd->tx_argc == 1)
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{
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/* Return a random number */
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#ifdef MAGIC_WRAPPER
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Tcl_SetObjResult(magicinterp, Tcl_NewIntObj(random()));
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#else
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TxPrintf("%d", random());
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#endif
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}
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else if ((cmd->tx_argc >= 2) && (!strcmp(cmd->tx_argv[1], "seed")))
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{
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if (cmd->tx_argc == 3)
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{
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value = atoi(cmd->tx_argv[2]);
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}
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else
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{
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value = (int)time(NULL);
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}
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srandom(value);
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}
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else
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{
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TxPrintf("usage: random [seed [<value>]]\n");
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return;
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}
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}
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#if !defined(NO_SIM_MODULE) && defined(RSIM_MODULE)
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/*
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@ -49,7 +49,7 @@ extern void CmdGetcell(), CmdGrid(), CmdIdentify();
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extern void CmdLabel(), CmdLoad();
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extern void CmdMove(), CmdNetlist(), CmdOrient(), CmdPaint(), CmdPath();
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extern void CmdPlow(), CmdPolygon(), CmdPort(), CmdProperty();
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extern void CmdSave(), CmdScaleGrid(), CmdSee();
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extern void CmdRandom(), CmdSave(), CmdScaleGrid(), CmdSee();
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extern void CmdSelect(), CmdSetLabel(), CmdSideways();
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extern void CmdShell(), CmdSnap();
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extern void CmdStretch(), CmdStraighten();
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@ -407,6 +407,9 @@ DBWInitCommands()
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WindAddCommand(DBWclientID,
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"rotate [+/-][deg] rotate selection and box (counter)clockwise",
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CmdClockwise, FALSE); /* "rotate" is alias for "clockwise" */
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WindAddCommand(DBWclientID,
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"random [seed [value]] generate random number or set random seed",
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CmdRandom, FALSE);
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WindAddCommand(DBWclientID,
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"save [filename] save edit cell on disk",
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CmdSave, FALSE);
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@ -0,0 +1,473 @@
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#
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# nmos.tech --
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#
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# Defines the MOSIS 4.0 micron NMOS technology for Magic. Some
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# of the characteristics of this technology are:
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#
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# 1. 1 level of metal.
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# 2. Buried contacts.
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# 3. No butting contacts.
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#
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# Copyright (C) 1985 Regents of the University of California
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# All rights reserved.
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#
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# sccsid @(#)nmos.tech 3.73 MAGIC (Berkeley) 11/22/85
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#
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tech
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format 35
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nmos
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end
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version
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version 0
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description "MOSIS 4.0 micron NMOS"
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requires magic-8.3.0
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end
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planes
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active,diff,poly_diff
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metal
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end
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types
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active polysilicon,poly,red
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active diffusion,diff,green
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metal metal,blue
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active poly_metal_contact,pmc
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active diff_metal_contact,dmc
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active enhancement_fet,efet
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active depletion_fet,dfet
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active depletion_capacitor,dcap
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active buried_contact,bc
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metal glass_contact,glass
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end
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styles
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styletype mos
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polysilicon 1
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diffusion 2
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metal 20
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enhancement_fet 6
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enhancement_fet 7
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depletion_fet 6
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depletion_fet 10
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depletion_capacitor 6
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depletion_capacitor 11
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buried_contact 6
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buried_contact 33
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poly_metal_contact 1
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poly_metal_contact 20
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poly_metal_contact 32
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diff_metal_contact 2
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diff_metal_contact 20
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diff_metal_contact 32
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glass_contact 20
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glass_contact 34
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error_s 42
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error_p 42
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error_ps 42
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# Hint layers
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magnet 39
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fence 38
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rotate 37
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end
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contact
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pmc poly metal
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dmc diff metal
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end
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aliases
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allDiff diff,dmc,bc,efet,dfet,dcap
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allPoly poly,pmc,bc,efet,dfet,dcap
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tran efet,dfet
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allMetal metal,pmc,dmc,glass
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spP (space,poly,pmc)/a
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sdD (space,diff,dmc)/a
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notDmc space,metal,pmc,glass
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notPmc space,metal,dmc,glass
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allButFet (space,diff,poly,dmc,pmc,bc)/a
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allpdTypes (space,diff,poly,dmc,pmc,bc,dfet,dcap,efet)/a
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end
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compose
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# The following rule allows transistors to be built up of poly and diff */
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compose efet poly diff
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# The following rules allow poly or diff to be erased from fets or bcs */
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decompose dfet poly diff
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decompose dcap poly diff
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decompose bc poly diff
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# The following lets us erase metal from a glass_contact to get space */
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erase glass metal space
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end
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#
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# Electrical connectivity. Each tile in the group on the left
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# is considered to be connected to each tile in the group on
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# the right. Tiles within the groups are not necessarily
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# connected to each other.
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#
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connect
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poly pmc,efet,dfet,dcap,bc
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diff bc,dmc
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efet pmc,dmc,bc,dfet,dcap
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dfet pmc,dmc,bc,dcap
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dcap pmc,dmc,bc
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pmc dmc,bc
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dmc bc
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metal glass,pmc,dmc
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glass pmc,dmc
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end
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# Information used to generate CIF files. The only tricky business
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# is to merge necks between adjacent implants or buried windows.
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# The grow-shrink does this. Also, note that labels on Magic layers
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# get attached to the first CIF layer containing that Magic layer
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# in an "or" or "bloat-or" statement. This makes order important
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# (for example, we want transistor labels to attach to the poly gate).
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#
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cifoutput
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style lambda=2
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scalefactor 200 100
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layer NP poly,pmc,efet,dfet,dcap,bc
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labels poly,efet,dfet,dcap,bc
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calma 1 1
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layer ND diff,dmc,efet,dfet,dcap,bc
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labels diff
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calma 2 1
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layer NM metal,pmc,dmc,glass
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labels metal,pmc,dmc,glass
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calma 3 1
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layer NI
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bloat-or dfet,dcap * 200 diff,bc 400
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grow 100
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shrink 100
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calma 4 1
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layer NC dmc
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squares 400
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calma 5 1
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layer NC pmc
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squares 400
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calma 6 1
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layer NG glass
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calma 7 1
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layer NB
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bloat-or bc * 200 diff,dmc 400 dfet 0
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grow 100
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shrink 100
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calma 8 1
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end
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# Information on how to read CIF files. Read in all the CIF layers,
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# then perform geometric operations to get the Magic layers. The
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# order in which the Magic layers are generated is important!
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#
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cifinput
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style lambda=2
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scalefactor 200
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layer poly NP
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labels NP
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layer diff ND
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labels ND
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layer metal NM
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labels NM
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layer efet NP
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and ND
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layer dfet NI
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and NP
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and ND
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layer pmc NC
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grow 200
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and NM
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and NP
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layer dmc NC
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grow 200
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and NM
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and ND
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# Buried contacts must be generated after transistors, since they
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# override transistors.
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#
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layer bc NB
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and NP
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and ND
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layer glass NG
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end
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mzrouter
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style irouter
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layer metal 32 32 256 1
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layer poly 64 64 256 1
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contact pmc metal poly 1024
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end
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#
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# DRC information
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# Width, spacing and edge rules are "compiled" into rules table entries.
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#
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# width: types in the mask, taken collectively, must have the given width
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#
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# spacing: types in mask1 must be separated by distance from types in mask2
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#
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# edge: explict entries for the rules table --
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# LHS RHS distance types allowed on RHS corner mask reason
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#
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||||
# All combinations of single elements of the LHS and RHS masks
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# are used to form a rule.
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||||
#
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||||
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||||
drc
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||||
width allDiff 2 "Diffusion width must be at least 2"
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width dmc 4 "Metal_diff contact width must be at least 4"
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||||
width allPoly 2 "Polysilicon width must be at least 2"
|
||||
width pmc 4 "Metal_poly contact width must be at least 4"
|
||||
width bc 2 "Buried contact width must be at least 2"
|
||||
width efet 2 "Enhancement FET width must be at least 2"
|
||||
width dfet 2 "Depletion FET width must be at least 2"
|
||||
width dcap 2 "Depletion capacitor width must be at least 2"
|
||||
width allMetal 3 "Metal width must be at least 3"
|
||||
|
||||
spacing allDiff allDiff 3 touching_ok \
|
||||
"Diff-diff separation must be at least 3"
|
||||
spacing allPoly allPoly 2 touching_ok \
|
||||
"Poly-poly separation must be at least 2"
|
||||
spacing tran pmc,dmc 1 touching_illegal \
|
||||
"Transistor-contact separation must be at least 1"
|
||||
spacing efet dfet,dcap 3 touching_illegal \
|
||||
"Enhancement-depletion transistor separation must be at least 3"
|
||||
spacing allMetal allMetal 3 touching_ok \
|
||||
"Metal-metal separation must be at least 3"
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||||
#
|
||||
# Diff and poly cannot be adjacent, except at corners where
|
||||
# the intermediate material is "bc", "efet", "dfet", or "dcap".
|
||||
# Thus, there is no need for rules with RHS equal to "Bef".
|
||||
# But corner extension applies if the intermediate material is "s".
|
||||
# For this reason, the first edge rule CANNOT be rewritten as
|
||||
# "edge diff pP 1 0 pP 1".
|
||||
#
|
||||
edge diff spP 1 (space)/a spP 1 \
|
||||
"Diff-poly separation must be at least 1"
|
||||
edge poly sdD 1 (space)/a sdD 1 \
|
||||
"Diff-poly separation must be at least 1"
|
||||
#
|
||||
# Allow dmc and pmc to be adjacent since they are electrically shorted.
|
||||
#
|
||||
edge dmc (space,poly)/a 1 (space)/a (space,poly)/a 1 \
|
||||
"Diff-poly separation must be at least 1"
|
||||
edge pmc (space,diff)/a 1 (space)/a (space,diff)/a 1 \
|
||||
"Diff-poly separation must be at least 1"
|
||||
|
||||
#
|
||||
# Don't let pmc and dmc have convex shapes, since this may interfere
|
||||
# with the via-generation process. The corner check in the rules
|
||||
# below does this. Also don't let contacts overlap between cells
|
||||
# unless they do so exactly.
|
||||
#
|
||||
|
||||
edge4way dmc notDmc 1 notDmc notDmc,dmc 1 \
|
||||
"Diffusion-metal contacts must be rectangular"
|
||||
edge4way pmc notPmc 1 notPmc notPmc,pmc 1 \
|
||||
"Poly-metal contacts must be rectangular"
|
||||
exact_overlap pmc,dmc
|
||||
#
|
||||
# Transistors cannot touch space, except in corners.
|
||||
# The corner mask is set to 0 to prevent checking there.
|
||||
#
|
||||
edge tran (space)/a 1 0 0 0 \
|
||||
"Transistor overhang is missing"
|
||||
edge (space)/a tran 1 0 0 0 \
|
||||
"Transistor overhang is missing"
|
||||
#
|
||||
# Buried contacts must be 3 lambda from efets in all cases,
|
||||
# and 4 lambda in some. Depends on the orientation of the
|
||||
# buried contact implant. The 4x3 corner checks ON BOTH
|
||||
# SIDES solve the problem. Buried contacts may abut
|
||||
# depletion transistors, but only if the transistors are
|
||||
# fairly long (otherwise, a misalignment in the buried
|
||||
# window mask may make a huge difference in the transistor's
|
||||
# effective length).
|
||||
#
|
||||
spacing bc efet 3 touching_illegal \
|
||||
"Buried contact-transistor separation must be at least 3"
|
||||
spacing bc dfet 3 touching_ok \
|
||||
"Buried contact-transistor separation must be at least 3"
|
||||
edge4way bc diff,dmc 4 allButFet allpdTypes 3 \
|
||||
"Buried contact-transistor separation must be at least 4 on diff side"
|
||||
edge4way bc dfet 4 dfet 0 0 \
|
||||
"Transistors next to buried contacts must be at least 4 long"
|
||||
|
||||
#
|
||||
# WARNING: The above rules don't take care of poly approaching
|
||||
# the buried contact on the diffusion side. Unfortunately, the
|
||||
# only fix is a rule that is ridiculously conservative. So
|
||||
# for now, buyer beware!
|
||||
#
|
||||
|
||||
#
|
||||
# 3 by 2 shape of buried contact next to dfet.
|
||||
# No corner check.
|
||||
#
|
||||
edge4way dfet bc 3 bc 0 0 \
|
||||
"Buried contact next to depletion transistor must be at least 3x2"
|
||||
#
|
||||
# Poly and diffusion must overhang transistors by 2.
|
||||
#
|
||||
# Corner checks are necessary for L or S shaped transistors.
|
||||
#
|
||||
# Don't worry about dfet -- buried_contact boundaries here.
|
||||
#
|
||||
edge4way tran poly 2 poly,pmc poly 2 \
|
||||
"Polysilicon must overhang transistor by at least 2"
|
||||
edge4way tran diff 2 diff,dmc diff 2 \
|
||||
"Diffusion must overhang transistor by at least 2"
|
||||
|
||||
# Cannot change transistors as a result of cell overlaps */
|
||||
no_overlap efet,dfet efet,dfet
|
||||
end
|
||||
|
||||
#
|
||||
# Parameters for circuit extraction.
|
||||
# A type may appear both as a node and as a transistor. When it
|
||||
# appears as a node, we are describing the gate, and when it appears
|
||||
# as a transistor, we are describing the channel.
|
||||
#
|
||||
|
||||
extract
|
||||
style default
|
||||
# scale factor: output units (centimicrons) per lambda */
|
||||
lambda 200
|
||||
|
||||
# chunk size for hierarchical extraction, in lambda */
|
||||
step 100
|
||||
|
||||
planeorder active 0
|
||||
planeorder metal 1
|
||||
|
||||
# sheet resistivity milli-ohms per square */
|
||||
resist poly,pmc/poly,efet,dfet,bc 30000
|
||||
resist diff,dmc/poly 10000
|
||||
resist metal,glass 30
|
||||
|
||||
# area capacitance atto-farads/lambda**2 */
|
||||
areacap poly,efet,dfet 200
|
||||
areacap metal,glass 120
|
||||
areacap diff 400
|
||||
areacap bc 600
|
||||
areacap dmc/poly 520
|
||||
areacap pmc/poly 320
|
||||
|
||||
# sidewall capacitance atto-farads/lambda */
|
||||
perimc diff,dmc/poly,bc space,dfet,efet 200
|
||||
|
||||
# transistors terms #terms name substr gs-cap gc-cap */
|
||||
fet efet diff 2 efet GND! 0 0
|
||||
fet dfet diff,bc 2 dfet GND! 0 0
|
||||
fet dcap diff,bc 1 dcap GND! 0 0
|
||||
# End of style "default" */
|
||||
end
|
||||
|
||||
# Information for the wiring interface */
|
||||
wiring
|
||||
contact pmc 4 metal 0 poly 0
|
||||
contact dmc 4 metal 0 diff 0
|
||||
contact bc 2 poly 0 diff 0
|
||||
end
|
||||
|
||||
# Information to control the router */
|
||||
router
|
||||
layer1 metal 3 metal,pmc/metal,dmc/metal,glass 3
|
||||
layer2 poly 2 poly,efet,dfet,dcap,pmc,bc 2 diff,dmc 1
|
||||
contacts pmc 4
|
||||
gridspacing 7
|
||||
end
|
||||
|
||||
# Information for plowing */
|
||||
plowing
|
||||
fixed efet,dfet,dcap,bc,glass
|
||||
covered efet,dfet,dcap,bc
|
||||
drag efet,dfet,dcap,bc
|
||||
end
|
||||
|
||||
plot
|
||||
style versatec
|
||||
|
||||
# Same as Gremlin stipple 9: */
|
||||
dfet,dcap \
|
||||
07c0 0f80 1f00 3e00 \
|
||||
7c00 f800 f001 e003 \
|
||||
c007 800f 001f 003e \
|
||||
00c7 00f8 01f0 03e0
|
||||
|
||||
# Same as Gremlin stipple 10: */
|
||||
efet,dcap \
|
||||
1f00 0f80 07c0 03e0 \
|
||||
01f0 00f8 007c 003e \
|
||||
001f 800f c007 e003 \
|
||||
f001 f800 7c00 3e00
|
||||
|
||||
# Same as Gremlin stipple 11: */
|
||||
bc \
|
||||
c3c3 c3c3 0000 0000 \
|
||||
0000 0000 c3c3 c3c3 \
|
||||
c3c3 c3c3 0000 0000 \
|
||||
0000 0000 c3c3 c3c3
|
||||
|
||||
# Same as Gremlin stipple 12: */
|
||||
glass \
|
||||
0040 0080 0100 0200 \
|
||||
0400 0800 1000 2000 \
|
||||
4000 8000 0001 0002 \
|
||||
0004 0008 0010 0020
|
||||
|
||||
# Same as Gremlin stipple 17: */
|
||||
diff,dmc/active,efet,dfet,dcap,bc \
|
||||
0000 4242 6666 0000 \
|
||||
0000 2424 6666 0000 \
|
||||
0000 4242 6666 0000 \
|
||||
0000 2424 6666 0000
|
||||
|
||||
# Same as Gremlin stipple 19: */
|
||||
poly,pmc/active,efet,dfet,dcap,bc \
|
||||
0808 0400 0202 0101 \
|
||||
8080 4000 2020 1010 \
|
||||
0808 0004 0202 0101 \
|
||||
8080 0040 2020 1010
|
||||
|
||||
# Same as Gremlin stipple 22: */
|
||||
metal,dmc/metal,pmc/metal,glass \
|
||||
8080 0000 0000 0000 \
|
||||
0808 0000 0000 0000 \
|
||||
8080 0000 0000 0000 \
|
||||
0808 0000 0000 0000
|
||||
|
||||
# Same as Gremlin stipple 23: */
|
||||
glass \
|
||||
0000 0000 1c1c 3e3e \
|
||||
3636 3e3e 1c1c 0000 \
|
||||
0000 0000 1c1c 3e3e \
|
||||
3636 3e3e 1c1c 0000
|
||||
|
||||
pmc,dmc X
|
||||
bc B
|
||||
|
||||
style gremlin
|
||||
dfet,dcap 9
|
||||
efet,dcap 10
|
||||
bc 11
|
||||
glass 12
|
||||
diff,dmc/active,efet,dfet,dcap,bc 17
|
||||
poly,pmc/active,efet,dfet,dcap,bc 19
|
||||
metal,dmc,pmc,glass 22
|
||||
pmc,dmc X
|
||||
bc B
|
||||
end
|
||||
Loading…
Reference in New Issue