Added new statements "connect" and "disconnect" to the extract

section of the tech file, which can be used to alter the layer
connectivity tables from the default.  This can be used, for
example, to disconnect substrate and well from taps, to
generate a netlist that checks for soft-connect errors.
This commit is contained in:
R. Timothy Edwards 2025-10-06 11:50:38 -04:00
parent a2390167e6
commit d6d8620a7c
3 changed files with 62 additions and 14 deletions

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@ -1 +1 @@
8.3.556 8.3.557

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@ -34,11 +34,15 @@ Convert extracted file(s) to a SPICE format file.
(see Summary, below). (see Summary, below).
<DT> <B>default</B> <DT> <B>default</B>
<DD> Reset to default values <DD> Reset to default values
<DT> <B>format hspice</B>|<B>spice2</B>|<B>spice3</B>|<B>ngspice</B> <DT> <B>format hspice</B>|<B>spice2</B>|<B>spice3</B>|<B>ngspice</B>|<B>cdl</B>
<DD> Set output format. <B>spice3</B> is the default, <DD> Set output format. <B>spice3</B> is the default,
for compatibility with <B>tclspice</B>. This is a for compatibility with <B>tclspice</B>. This is a
change from previous versions of magic, where the change from previous versions of magic, where the
default was <B>hspice</B>. default was <B>hspice</B>. <B>ngspice</B> is set as
default by the <B>ext2spice lvs</B> option. <B>cdl</B>
format incorporates some common syntax used by CDL format
files, including placing a slash between a subcircuit's
pins and the subcircuit name.
<DT> <B>rthresh</B> [<I>value</I>] <DT> <B>rthresh</B> [<I>value</I>]
<DD> Set resistance threshold value. Lumped resistances <DD> Set resistance threshold value. Lumped resistances
below this value will not be written to the output. The below this value will not be written to the output. The
@ -46,7 +50,6 @@ Convert extracted file(s) to a SPICE format file.
to prohibit writing any lumped resistances to the output. to prohibit writing any lumped resistances to the output.
<DT> <B>cthresh</B> [<I>value</I>] <DT> <B>cthresh</B> [<I>value</I>]
<DD> Set capacitance threshold value. The value is in femtofarads, <DD> Set capacitance threshold value. The value is in femtofarads,
or may be the keyword <B>infinite</B> to prohibit writing
any parasitic capacitances to the output. any parasitic capacitances to the output.
<DT> <B>merge</B> [<I>merge_option</I>] <DT> <B>merge</B> [<I>merge_option</I>]
<DD> Merge parallel devices/transistors. The valid merge options are: <DD> Merge parallel devices/transistors. The valid merge options are:
@ -235,7 +238,7 @@ Convert extracted file(s) to a SPICE format file.
class, and substrate node name for device type <I>device</I>. class, and substrate node name for device type <I>device</I>.
Resistance classes are indexed by number and must match the Resistance classes are indexed by number and must match the
definition in the technology file's extract section. definition in the technology file's extract section.
<DT> <B>-f spice2</B>|<B>spice3</B>|<B>hspice</B>|<B>ngspice</B> <DT> <B>-f spice2</B>|<B>spice3</B>|<B>hspice</B>|<B>ngspice</B>|<B>cdl</B>
<DD> Choose the output SPICE format for compatibility with <DD> Choose the output SPICE format for compatibility with
different versions of SPICE. different versions of SPICE.
<DT> <B>-d</B> <DT> <B>-d</B>

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@ -78,10 +78,10 @@ void ExtTechScale(int, int);
typedef enum typedef enum
{ {
AREAC, CONTACT, CSCALE, AREAC, CONNECT, CONTACT, CSCALE,
DEFAULTAREACAP, DEFAULTOVERLAP, DEFAULTPERIMETER, DEFAULTSIDEOVERLAP, DEFAULTAREACAP, DEFAULTOVERLAP, DEFAULTPERIMETER, DEFAULTSIDEOVERLAP,
DEFAULTSIDEWALL, DEFAULTSIDEWALL,
DEVICE, DEVRESIST, FET, FETRESIST, FRINGESHIELDHALO, DEVICE, DEVRESIST, DISCONNECT, FET, FETRESIST, FRINGESHIELDHALO,
HEIGHT, ANTENNA, MODEL, TIEDOWN, LAMBDA, OVERC, HEIGHT, ANTENNA, MODEL, TIEDOWN, LAMBDA, OVERC,
PERIMC, PLANEORDER, NOPLANEORDER, RESIST, RSCALE, SIDEHALO, SIDEOVERLAP, PERIMC, PLANEORDER, NOPLANEORDER, RESIST, RSCALE, SIDEHALO, SIDEOVERLAP,
SIDEWALL, STEP, STYLE, SUBSTRATE, UNITS, VARIANT SIDEWALL, STEP, STYLE, SUBSTRATE, UNITS, VARIANT
@ -100,6 +100,9 @@ static const keydesc keyTable[] = {
{"areacap", AREAC, 3, 3, {"areacap", AREAC, 3, 3,
"types capacitance"}, "types capacitance"},
{"connect", CONNECT, 3, 3,
"types1 types1"},
{"contact", CONTACT, 3, 6, {"contact", CONTACT, 3, 6,
"type resistance"}, "type resistance"},
@ -127,6 +130,9 @@ static const keydesc keyTable[] = {
{"devresist", DEVRESIST, 4, 4, {"devresist", DEVRESIST, 4, 4,
"type region ohms-per-square"}, "type region ohms-per-square"},
{"disconnect", DISCONNECT, 3, 3,
"types1 types1"},
{"fet", FET, 8, 9, {"fet", FET, 8, 9,
"types terminal-types min-#-terminals name [subs-types] subs-node gscap gate-chan-cap"}, "types terminal-types min-#-terminals name [subs-types] subs-node gscap gate-chan-cap"},
@ -935,16 +941,24 @@ extTechStyleInit(style)
} }
doConvert = FALSE; doConvert = FALSE;
// The exts_globSubstratePlane setting of -1 will be used to set a /* The exts_globSubstratePlane setting of -1 will be used to set a
// backwards-compatibility mode matching previous behavior with * backwards-compatibility mode matching previous behavior with
// respect to the substrate when there is no "substrate" line in * respect to the substrate when there is no "substrate" line in
// the techfile. * the techfile.
*/
style->exts_globSubstratePlane = -1; style->exts_globSubstratePlane = -1;
style->exts_globSubstrateDefaultType = -1; style->exts_globSubstrateDefaultType = -1;
TTMaskZero(&style->exts_globSubstrateTypes); TTMaskZero(&style->exts_globSubstrateTypes);
TTMaskZero(&style->exts_globSubstrateShieldTypes); TTMaskZero(&style->exts_globSubstrateShieldTypes);
style->exts_globSubstrateName = (char *)NULL; style->exts_globSubstrateName = (char *)NULL;
/* Initialize exts_nodeConn to match DBConnectTbl, so that "connect"
* and "disconnect" statements in the extract section can be used to
* modify the defaults.
*/
for (r = 0; r < NT; r++)
style->exts_nodeConn[r] = DBConnectTbl[r];
} }
@ -1959,7 +1973,7 @@ ExtTechLine(sectionName, argc, argv)
TileTypeBitMask types1, types2, termtypes[MAXSD]; TileTypeBitMask types1, types2, termtypes[MAXSD];
TileTypeBitMask near, far, ov, shield, subsTypes, idTypes; TileTypeBitMask near, far, ov, shield, subsTypes, idTypes;
char *subsName, *transName, *cp, *endptr, *paramName; char *subsName, *transName, *cp, *endptr, *paramName;
TileType s, t, r, o; TileType s, t, t2, r, o;
const keydesc *kp, *dv; const keydesc *kp, *dv;
HashEntry *he; HashEntry *he;
EdgeCap *cnew; EdgeCap *cnew;
@ -2182,10 +2196,12 @@ ExtTechLine(sectionName, argc, argv)
switch (kp->k_key) switch (kp->k_key)
{ {
case AREAC: case AREAC:
case CONNECT:
case CONTACT: case CONTACT:
case DEVRESIST:
case DISCONNECT:
case FET: case FET:
case FETRESIST: case FETRESIST:
case DEVRESIST:
case HEIGHT: case HEIGHT:
case ANTENNA: case ANTENNA:
case TIEDOWN: case TIEDOWN:
@ -2220,6 +2236,19 @@ ExtTechLine(sectionName, argc, argv)
ExtCurStyle->exts_overlapMult[0][t] = (float) capVal * FRINGE_MULT; ExtCurStyle->exts_overlapMult[0][t] = (float) capVal * FRINGE_MULT;
} }
break; break;
case CONNECT:
/* Parse like a line from the "connect" section */
DBTechNoisyNameMask(argv[2], &types2);
TTMaskSetMask(allExtractTypes, &types2);
for (t = 0; t < DBNumTypes; t++)
if (TTMaskHasType(&types1, t))
for (t2 = 0; t2 < DBNumTypes; t2++)
if (TTMaskHasType(&types2, t2))
{
TTMaskSetType(&ExtCurStyle->exts_nodeConn[t], t2);
TTMaskSetType(&ExtCurStyle->exts_nodeConn[t2], t);
}
break;
case CONTACT: case CONTACT:
/* Contact size, border, spacing deprecated (now taken from */ /* Contact size, border, spacing deprecated (now taken from */
/* cifoutput "squares" generation parameters). */ /* cifoutput "squares" generation parameters). */
@ -2252,6 +2281,22 @@ ExtTechLine(sectionName, argc, argv)
ExtCurStyle->exts_capScale = 1; ExtCurStyle->exts_capScale = 1;
} }
break; break;
case DISCONNECT:
/* Parse like a line from the "connect" section; however, */
/* "disconnect" overrides an existing connection in the */
/* DBConnectTbl array by removing the connection between */
/* layers. */
DBTechNoisyNameMask(argv[2], &types2);
TTMaskSetMask(allExtractTypes, &types2);
for (t = 0; t < DBNumTypes; t++)
if (TTMaskHasType(&types1, t))
for (t2 = 0; t2 < DBNumTypes; t2++)
if (TTMaskHasType(&types2, t2))
{
TTMaskClearType(&ExtCurStyle->exts_nodeConn[t], t2);
TTMaskClearType(&ExtCurStyle->exts_nodeConn[t2], t);
}
break;
case FET: case FET:
/* Original FET format, kept for backwards compatibility */ /* Original FET format, kept for backwards compatibility */
@ -3492,7 +3537,7 @@ extTechFinalStyle(style)
for (r = TT_TECHDEPBASE; r < DBNumTypes; r++) for (r = TT_TECHDEPBASE; r < DBNumTypes; r++)
{ {
maskBits = style->exts_nodeConn[r] = DBConnectTbl[r]; maskBits = style->exts_nodeConn[r];
if (!TTMaskHasType(&style->exts_deviceMask, r)) if (!TTMaskHasType(&style->exts_deviceMask, r))
{ {
TTMaskZero(&style->exts_deviceConn[r]); TTMaskZero(&style->exts_deviceConn[r]);