magic/doc/tutcells/tut11b.ext

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timestamp 552706284
version 7.2
tech scmos
style lambda=1.0(scna20_orb)
scale 1000 1 100
resistclasses 26670 59550 23860 19690 27260 2000000 49 26 2505830
use tut11d tut11d_0 1 0 0 0 1 0
node "m2_n40_n60#" 0 0 -40 -60 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 162 66 0 0
node "a_n34_n45#" 80 0 -34 -45 ndiff 12 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "a_n34_n41#" 329 10522 -34 -41 ndiff 24 36 0 0 16 16 0 0 0 0 0 0 164 98 88 52 0 0
node "a_n18_n22#" 196 5362 -18 -22 pdiff 0 0 58 36 0 0 0 0 0 0 0 0 32 24 162 66 0 0
node "a_n34_n52#" 464 3666 -34 -52 ndc 24 36 24 22 0 0 0 0 0 0 0 0 172 102 0 0 0 0
node "a_n20_n60#" 716 6828 -20 -60 p 0 0 0 0 120 124 0 0 0 0 0 0 0 0 0 0 0 0
node "a_n36_n43#" 620 10974 -36 -43 p 0 0 0 0 112 112 0 0 0 0 0 0 20 18 72 44 0 0
node "a_n40_n60#" 859 10176 -40 -60 p 0 0 0 0 144 148 0 0 0 0 0 0 0 0 0 0 0 0
node "w_n40_n60#" 0 0 -40 -60 pw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cap "w_n40_n60#" "a_n34_n52#" 5452
cap "a_n34_n45#" "a_n34_n52#" 282
cap "a_n40_n60#" "a_n34_n52#" 120
cap "w_n40_n60#" "a_n40_n60#" 6172
cap "m2_n40_n60#" "a_n34_n52#" 1080
cap "m2_n40_n60#" "w_n40_n60#" 2166
cap "a_n34_n52#" "a_n34_n41#" 720
cap "a_n40_n60#" "a_n18_n22#" 228
cap "w_n40_n60#" "a_n34_n41#" 1658
cap "m2_n40_n60#" "a_n40_n60#" 228
cap "a_n36_n43#" "a_n20_n60#" 38
cap "a_n18_n22#" "a_n34_n41#" 1080
cap "a_n34_n52#" "a_n36_n43#" 876
cap "w_n40_n60#" "a_n36_n43#" 3812
cap "a_n18_n22#" "a_n36_n43#" 66
cap "w_n40_n60#" "a_n20_n60#" 6664
cap "a_n34_n41#" "a_n36_n43#" 152
cap "a_n18_n22#" "a_n20_n60#" 228
cap "m2_n40_n60#" "a_n20_n60#" 228
cap "a_n34_n41#" "a_n20_n60#" 152
device mosfet nfet -34 -47 -33 -46 2 6 "w_n40_n60#" "a_n40_n60#" 4 0 "a_n34_n52#" 6 0 "a_n34_n45#" 6 0
device mosfet nfet -34 -43 -33 -42 2 6 "w_n40_n60#" "a_n36_n43#" 4 0 "a_n34_n45#" 6 0 "a_n34_n41#" 6 0
device mosfet pfet -20 -22 -19 -21 2 6 "Vdd!" "a_n20_n60#" 4 0 "a_n34_n52#" 6 0 "a_n18_n22#" 6 0
cap "m2_n40_n60#" "w_n40_n60#" -456
cap "w_n40_n60#" "tut11d_0/a_n11_n54#" 395
cap "a_n36_n43#" "a_n18_n22#" 264
merge "tut11d_0/Vdd" "a_n18_n22#" -3652 0 0 -36 -26 0 0 0 0 0 0 0 0 -32 -24 -24 -20 0 0
merge "tut11d_0/GND" "w_n40_n60#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -72 -48 0 0
merge "w_n40_n60#" "m2_n40_n60#" 0
merge "tut11d_0/a_n11_n54#" "a_n34_n41#" -1035 0 0 0 0 0 -8 0 0 0 0 0 0 0 0 0 0 0 0
merge "tut11d_0/B" "a_n36_n43#" -475 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -32 -32 0 0