Created 2019 03 09 (markdown)

2019-03-09 10:28:40 +01:00 · 2019-03-09 10:28:40 +01:00 · b136813f59
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+# Better integration of netlisting into DRC script
+
+I have enhanced the DRC script language for better support of
+netlisting. So this is the first step towards an "LVS" mode of the 
+DRC feature.
+
+DRC scripts are easier to use than the native API (RBA or pya objects).
+Some of the overhead of the API has been hidden. For example, 
+intra-layer connectivity is implied and does not need to be specified
+explicitly.
+
+Currently there is no browser yet by which the netlist can be viewed.
+I plan something similar to the net browser from the net tracer, but
+with an hierarchical view.
+
+Here is a sample of a "DRC" script doing a netlisting:
+
+```ruby
+deep
+
+# Drawing layers
+
+nwell       = input(1, 0)
+diff        = input(2, 0)
+pplus       = input(3, 0)
+nplus       = input(4, 0)
+poly        = input(5, 0)
+thickox     = input(6, 0)
+polyres     = input(7, 0)
+contact     = input(8, 0)
+metal1      = input(9, 0)
+via         = input(10, 0)
+metal2      = input(11, 0)
+
+# Special layer for bulk terminals
+
+bulk        = make_layer
+
+# Computed layers
+
+diff_in_nwell = diff & nwell
+pdiff       = diff_in_nwell - nplus
+ntie        = diff_in_nwell & nplus
+pgate       = pdiff & poly
+psd         = pdiff - pgate
+hv_pgate    = pgate & thickox
+lv_pgate    = pgate - hv_pgate
+hv_psd      = psd & thickox
+lv_psd      = psd - thickox
+
+diff_outside_nwell = diff - nwell
+ndiff      = diff_outside_nwell - pplus
+ptie       = diff_outside_nwell & pplus
+ngate      = ndiff & poly
+nsd        = ndiff - ngate
+hv_ngate   = ngate & thickox
+lv_ngate   = ngate - hv_ngate
+hv_nsd     = nsd & thickox
+lv_nsd     = nsd - thickox
+
+# PMOS transistor device extraction
+
+hvpmos_ex = RBA::DeviceExtractorMOS4Transistor::new("HVPMOS")
+extract_devices(hvpmos_ex, { "SD" => psd, "G" => hv_pgate, "P" => poly, "W" => nwell })
+
+lvpmos_ex = RBA::DeviceExtractorMOS4Transistor::new("LVPMOS")
+extract_devices(lvpmos_ex, { "SD" => psd, "G" => lv_pgate, "P" => poly, "W" => nwell })
+
+# NMOS transistor device extraction
+
+lvnmos_ex = RBA::DeviceExtractorMOS4Transistor::new("LVNMOS")
+extract_devices(lvnmos_ex, { "SD" => nsd, "G" => lv_ngate, "P" => poly, "W" => bulk })
+
+hvnmos_ex = RBA::DeviceExtractorMOS4Transistor::new("HVNMOS")
+extract_devices(hvnmos_ex, { "SD" => nsd, "G" => hv_ngate, "P" => poly, "W" => bulk })
+
+
+# Define connectivity for netlist extraction
+
+# Inter-layer
+connect(contact, ntie)
+connect(contact, ptie)
+connect(nwell,   ntie)
+connect(psd,     contact)
+connect(nsd,     contact)
+connect(poly,    contact)
+connect(contact, metal1)
+connect(metal1,  via)
+connect(via,     metal2)
+
+# Global connections
+connect_global(ptie, "BULK")
+connect_global(bulk, "BULK")
+
+# Actually performs the extraction
+
+netlist = l2n_data.netlist
+
+# Write the netlist to the original file name with extension ".spc"
+
+writer = RBA::NetlistSpiceWriter::new
+
+path = RBA::CellView::active.filename.sub(/\.[^\.]*$/, ".spc")
+netlist.write(path, writer, "Netlist extracted by KLayout")
+puts "Netlist written to #{path}"
+```
+