mirror of https://github.com/KLayout/klayout.git
Updated Deep Verification Base (markdown)
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@ -99,9 +99,11 @@ After device recognition, schematic extraction can proceed bottom-up to connect
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Here is a rough idea for a schematic extraction script:
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```(ruby)
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```ruby
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# ---------------------------------------------
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# device definitions
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# generic MOS device definitions
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class MOSDevice < DeviceExtractor
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def extract(layout, seed, body)
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@ -131,25 +133,30 @@ class MOSDevice < DeviceExtractor
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end
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# NMOS device definition
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class NMOSDevice < MOSDevice
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self.DEVICE_NAME = "NMOS"
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end
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# PMOS device definition
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class PMOSDevice < MOSDevice
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self.DEVICE_NAME = "PMOS"
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end
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# body
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# ---------------------------------------------
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# extraction script
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deep
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# generation rules
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sd = active - poly
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gate = active * poly
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pmos = gate * nwell
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nmos = gate - nwell
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# net extraction
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extract_nets do
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connect metal2, via1
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