Files
klayout/testdata
Matthias Koefferlein bdf5e3c124 WIP: fake pin debug issue with LVS
Fake pins: pins that happen because something connects to a cell at an
unexpected position. Such a pin is difficult to find. The solution is
to keep those nets and nur purge them so these nets can be identified
in the layout.

Here: is_floating? will be true only if there are no pins. Hence
nets with pins are not removed. is_passive is introduced for nets -
passive nets are such that don't have elements, but a pin.
Circuits are purged if they only have passive nets.
2019-09-30 21:58:13 +02:00
..
2019-09-30 21:58:13 +02:00
2019-07-24 00:16:47 +02:00
2019-01-08 01:09:25 +01:00
2019-01-08 01:09:25 +01:00