mirror of https://github.com/KLayout/klayout.git
28 lines
777 B
Plaintext
28 lines
777 B
Plaintext
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.SUBCKT RINGO VSS VDD FB ENABLE OUT
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X$1 VDD 1 VSS VDD FB ENABLE VSS ND2X1
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X$2 VDD 2 VSS VDD 1 VSS INVX1
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X$3 VDD 3 VSS VDD 2 VSS INVX1
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X$4 VDD 4 VSS VDD 3 VSS INVX1
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X$5 VDD 5 VSS VDD 4 VSS INVX1
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X$6 VDD 6 VSS VDD 5 VSS INVX1
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X$7 VDD 7 VSS VDD 6 VSS INVX1
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X$8 VDD 8 VSS VDD 7 VSS INVX1
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X$9 VDD 9 VSS VDD 8 VSS INVX1
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X$10 VDD 10 VSS VDD 9 VSS INVX1
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X$11 VDD FB VSS VDD 10 VSS INVX1
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X$12 VDD OUT VSS VDD FB VSS INVX1
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.ENDS RINGO
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.SUBCKT ND2X1 VDD OUT VSS NWELL B A BULK
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M$1 OUT A VDD NWELL PMOS L=0.25U W=1.5U
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M$2 OUT B VDD NWELL PMOS L=0.25U W=1.5U
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M$3 1 A VSS BULK NMOS L=0.25U W=0.95U
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M$4 OUT B 1 BULK NMOS L=0.25U W=0.95U
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.ENDS ND2X1
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.SUBCKT INVX1 VDD OUT VSS NWELL IN BULK
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M$1 OUT IN VDD NWELL PMOS L=0.25U W=1.5U
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M$2 OUT IN VSS BULK NMOS L=0.25U W=0.95U
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.ENDS INVX1
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