mirror of https://github.com/KLayout/klayout.git
201 lines
4.1 KiB
Plaintext
201 lines
4.1 KiB
Plaintext
#%lvsdb-klayout
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# Layout
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layout(
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top(TOP)
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unit(0.001)
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# Layer section
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# This section lists the mask layers (drawing or derived) and their connections.
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# Mask layers
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layer(l1 '1/0')
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layer(l3 '2/0')
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layer(l4 '3/0')
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layer(l2 '10/0')
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# Mask layer connectivity
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connect(l1 l1 l3 l2)
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connect(l3 l1 l3 l4)
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connect(l4 l3 l4)
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connect(l2 l1 l2)
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(CHIP
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# Circuit boundary
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rect((-4000 -6000) (11000 9000))
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# Outgoing pins and their connections to nets
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pin(name(pad3))
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pin(name(pad4))
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pin(name(pad5))
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pin(name(pad2))
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pin(name(pad1))
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pin(name(pad8))
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pin(name(pad6))
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pin(name(pad7))
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)
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circuit(TOP
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# Circuit boundary
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rect((-18500 -14000) (44500 28000))
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# Nets with their geometries
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net(1 name('3')
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rect(l1 (-10500 2000) (7500 1000))
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rect(l1 (-7500 0) (1000 4000))
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rect(l1 (-6000 0) (6000 1000))
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rect(l1 (-9000 -2000) (3500 3000))
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rect(l1 (-1500 -1500) (0 0))
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rect(l2 (12500 -5500) (1000 1000))
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)
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net(2 name('4')
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rect(l1 (1000 2000) (1000 10000))
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rect(l1 (-17500 0) (17500 1000))
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rect(l1 (-20500 -2000) (3500 3000))
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rect(l1 (-1500 -1500) (0 0))
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rect(l2 (17500 -10500) (1000 1000))
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)
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net(3 name('2')
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rect(l1 (-15500 -2000) (12500 1000))
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rect(l1 (-15500 -2000) (3500 3000))
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rect(l1 (-1500 -1500) (0 0))
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rect(l2 (12500 -500) (1000 1000))
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)
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net(4 name('1')
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rect(l1 (-15500 -13000) (6000 1000))
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rect(l1 (-1000 0) (1000 6000))
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rect(l1 (-9000 -8000) (3500 3000))
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rect(l1 (4500 5000) (7500 1000))
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rect(l1 (-13500 -7500) (0 0))
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rect(l2 (12500 6500) (1000 1000))
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)
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net(5 name('8')
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rect(l1 (1000 -13000) (22000 1000))
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rect(l1 (-22000 0) (1000 7000))
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rect(l1 (20500 -9000) (3500 3000))
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rect(l1 (-1500 -1500) (0 0))
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rect(l2 (-23500 6500) (1000 1000))
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)
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net(6 name('5,7')
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rect(l1 (6000 -6000) (7000 1000))
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rect(l1 (-1000 0) (1000 12000))
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rect(l1 (-1000 0) (11000 1000))
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rect(l1 (-500 -2000) (3500 3000))
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rect(l1 (-12200 -1500) (790 4500))
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rect(l1 (-8590 -10000) (1000 10000))
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rect(l1 (-1000 0) (17000 1000))
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rect(l1 (-500 -2000) (3500 3000))
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rect(l1 (-1500 -6500) (0 0))
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rect(l1 (0 5000) (0 0))
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rect(l2 (-18500 -18500) (1000 1000))
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rect(l2 (-1000 7000) (1000 1000))
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)
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net(7 name('6')
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rect(l1 (16000 -2000) (7000 1000))
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rect(l1 (-500 -2000) (3500 3000))
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rect(l1 (-1500 -1500) (0 0))
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rect(l1 (-18500 -500) (3500 1000))
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rect(l3 (6500 -1000) (1000 1000))
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rect(l3 (-8500 -1000) (1000 1000))
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rect(l4 (-1000 -1000) (8500 1000))
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rect(l2 (-11000 -1000) (1000 1000))
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)
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# Subcircuits and their connections
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circuit(1 CHIP location(0 0)
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pin(0 1)
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pin(1 2)
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pin(2 6)
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pin(3 3)
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pin(4 4)
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pin(5 5)
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pin(6 7)
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pin(7 6)
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)
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)
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)
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# Reference netlist
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reference(
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(CHIP
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# Outgoing pins and their connections to nets
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pin(name(PAD1))
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pin(name(PAD2))
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pin(name(PAD3))
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pin(name(PAD4))
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pin(name(PAD5))
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pin(name(PAD6))
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pin(name(PAD7))
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pin(name(PAD8))
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)
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circuit(TOP
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# Nets
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net(1 name('1'))
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net(2 name('2'))
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net(3 name('3'))
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net(4 name('4'))
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net(5 name('5'))
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net(6 name('6'))
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net(7 name('7'))
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net(8 name('8'))
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# Subcircuits and their connections
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circuit(1 CHIP name('1')
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pin(0 1)
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pin(1 2)
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pin(2 3)
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pin(3 4)
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pin(4 5)
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pin(5 6)
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pin(6 7)
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pin(7 8)
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)
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)
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)
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# Cross reference
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xref(
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circuit(CHIP CHIP match
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xref(
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pin(4 0 match)
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pin(3 1 match)
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pin(0 2 match)
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pin(1 3 match)
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pin(2 4 match)
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pin(6 5 match)
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pin(7 6 match)
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pin(5 7 match)
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)
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)
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circuit(TOP TOP nomatch
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log(
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entry(error description('Left-side net 5,7 is paired explicitly with a right-side one, but no net is present there'))
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entry(error description('Net 5,7 is not matching any net from reference netlist'))
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)
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xref(
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net(() 5 mismatch)
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net(() 7 mismatch)
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net(4 1 match)
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net(3 2 match)
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net(1 3 match)
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net(2 4 match)
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net(6 () mismatch)
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net(7 6 match)
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net(5 8 match)
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circuit(1 1 mismatch)
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)
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)
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)
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