mirror of https://github.com/KLayout/klayout.git
103 lines
2.3 KiB
Plaintext
103 lines
2.3 KiB
Plaintext
* Extracted by KLayout
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* cell RINGO
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* pin FB
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* pin VDD
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* pin OUT
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* pin ENABLE
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* pin VSS
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.SUBCKT RINGO 5 6 7 8 9
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* net 5 FB
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* net 6 VDD
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* net 7 OUT
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* net 8 ENABLE
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* net 9 VSS
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* cell instance $1 r0 *1 1.8,0
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X$1 6 1 9 6 5 8 9 ND2X1
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* cell instance $2 r0 *1 4.2,0
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X$2 6 2 9 6 1 9 INVX1
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* cell instance $3 r0 *1 6,0
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X$3 6 10 9 6 2 9 INVX1
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* cell instance $4 r0 *1 16.8,0
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X$4 6 3 9 6 11 9 INVX1
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* cell instance $5 r0 *1 18.6,0
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X$5 6 4 9 6 3 9 INVX1
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* cell instance $6 r0 *1 20.4,0
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X$6 6 5 9 6 4 9 INVX1
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* cell instance $7 r0 *1 22.2,0
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X$7 5 6 7 9 6 9 INVX2
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* cell instance $13 r0 *1 7.8,0
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X$13 6 12 9 6 10 9 INVX1
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* cell instance $14 r0 *1 9.6,0
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X$14 6 13 9 6 12 9 INVX1
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* cell instance $15 r0 *1 11.4,0
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X$15 6 14 9 6 13 9 INVX1
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* cell instance $16 r0 *1 13.2,0
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X$16 6 15 9 6 14 9 INVX1
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* cell instance $17 r0 *1 15,0
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X$17 6 11 9 6 15 9 INVX1
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.ENDS RINGO
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* cell INVX2
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* pin IN
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* pin VDD
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* pin OUT
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* pin VSS
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* pin
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* pin SUBSTRATE
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.SUBCKT INVX2 1 2 3 4 5 6
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* net 1 IN
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* net 2 VDD
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* net 3 OUT
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* net 4 VSS
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* net 6 SUBSTRATE
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* device instance $1 r0 *1 0.85,5.8 PMOS
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M$1 3 1 2 5 PMOS L=0.25U W=3U AS=0.975P AD=0.975P PS=5.8U PD=5.8U
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* device instance $3 r0 *1 0.85,2.135 NMOS
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M$3 3 1 4 6 NMOS L=0.25U W=1.9U AS=0.6175P AD=0.6175P PS=4.15U PD=4.15U
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.ENDS INVX2
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* cell INVX1
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* pin VDD
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* pin OUT
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* pin VSS
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* pin
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* pin IN
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* pin SUBSTRATE
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.SUBCKT INVX1 1 2 3 4 5 6
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* net 1 VDD
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* net 2 OUT
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* net 3 VSS
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* net 5 IN
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* net 6 SUBSTRATE
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* device instance $1 r0 *1 0.85,5.8 PMOS
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M$1 2 5 1 4 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.6375P PS=3.85U PD=3.85U
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* device instance $2 r0 *1 0.85,2.135 NMOS
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M$2 2 5 3 6 NMOS L=0.25U W=0.95U AS=0.40375P AD=0.40375P PS=2.75U PD=2.75U
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.ENDS INVX1
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* cell ND2X1
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* pin VDD
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* pin OUT
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* pin VSS
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* pin
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* pin B
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* pin A
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* pin SUBSTRATE
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.SUBCKT ND2X1 1 2 3 4 5 6 7
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* net 1 VDD
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* net 2 OUT
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* net 3 VSS
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* net 5 B
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* net 6 A
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* net 7 SUBSTRATE
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* device instance $1 r0 *1 0.85,5.8 PMOS
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M$1 1 6 2 4 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U
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* device instance $2 r0 *1 1.55,5.8 PMOS
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M$2 2 5 1 4 PMOS L=0.25U W=1.5U AS=0.3375P AD=0.6375P PS=1.95U PD=3.85U
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* device instance $3 r0 *1 0.85,2.135 NMOS
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M$3 8 6 3 7 NMOS L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U PD=1.4U
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* device instance $4 r0 *1 1.55,2.135 NMOS
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M$4 2 5 8 7 NMOS L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U PD=2.75U
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.ENDS ND2X1
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