mirror of https://github.com/KLayout/klayout.git
408 lines
8.2 KiB
Groff
408 lines
8.2 KiB
Groff
#%lvsdb-klayout
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# Layout
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layout(
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top(NAND2_WITH_DIODES)
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unit(0.001)
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# Layer section
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# This section lists the mask layers (drawing or derived) and their connections.
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# Mask layers
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layer(l3 'NWELL (1/0)')
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layer(l4 'POLY (5/0)')
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layer(l8 'CONTACT (6/0)')
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layer(l11 'METAL1 (7/0)')
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layer(l12 'METAL1_LABEL (7/1)')
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layer(l13 'VIA1 (8/0)')
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layer(l14 'METAL2 (9/0)')
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layer(l15 'METAL2_LABEL (9/1)')
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layer(l7)
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layer(l2)
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layer(l9)
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layer(l6)
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layer(l10)
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# Mask layer connectivity
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connect(l3 l3 l9)
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connect(l4 l4 l8)
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connect(l8 l4 l8 l11 l2 l9 l6 l10)
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connect(l11 l8 l11 l12 l13)
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connect(l12 l11)
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connect(l13 l11 l13 l14)
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connect(l14 l13 l14 l15)
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connect(l15 l14)
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connect(l7 l7)
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connect(l2 l8 l2)
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connect(l9 l3 l8 l9)
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connect(l6 l8 l6)
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connect(l10 l8 l10)
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# Global nets and connectivity
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global(l7 SUBSTRATE)
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global(l10 SUBSTRATE)
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# Device class section
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class(PMOS MOS4)
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class(NMOS MOS4)
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# Device abstracts section
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# Device abstracts list the pin shapes of the devices.
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device(D$PMOS PMOS
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terminal(S
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rect(l2 (-575 -750) (450 1500))
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)
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terminal(G
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rect(l4 (-125 -750) (250 1500))
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)
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terminal(D
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rect(l2 (125 -750) (500 1500))
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)
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terminal(B
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rect(l3 (-125 -750) (250 1500))
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)
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)
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device(D$PMOS$1 PMOS
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terminal(S
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rect(l2 (-625 -750) (500 1500))
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)
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terminal(G
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rect(l4 (-125 -750) (250 1500))
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)
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terminal(D
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rect(l2 (125 -750) (450 1500))
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)
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terminal(B
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rect(l3 (-125 -750) (250 1500))
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)
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)
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device(D$NMOS NMOS
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terminal(S
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rect(l6 (-575 -450) (450 900))
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)
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terminal(G
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rect(l4 (-125 -450) (250 900))
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)
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terminal(D
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rect(l6 (125 -450) (500 900))
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)
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terminal(B
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rect(l7 (-125 -450) (250 900))
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)
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)
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device(D$NMOS$1 NMOS
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terminal(S
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rect(l6 (-625 -450) (500 900))
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)
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terminal(G
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rect(l4 (-125 -450) (250 900))
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)
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terminal(D
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rect(l6 (125 -450) (450 900))
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)
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terminal(B
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rect(l7 (-125 -450) (250 900))
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)
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)
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(NAND2_WITH_DIODES
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# Circuit boundary
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rect((0 0) (3750 6150))
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# Nets with their geometries
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net(1 name(B)
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rect(l4 (350 2750) (550 400))
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rect(l4 (0 -2050) (250 3100))
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rect(l4 (-250 0) (250 1650))
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rect(l4 (-250 -5800) (250 1050))
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rect(l4 (-250 300) (250 1050))
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rect(l8 (-700 400) (200 200))
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rect(l11 (-300 -300) (400 400))
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text(l12 B (-200 -200))
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)
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net(2 name(A)
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rect(l4 (1900 3400) (550 400))
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rect(l4 (-800 -2700) (250 3100))
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rect(l4 (-250 0) (250 1650))
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rect(l4 (-250 -5800) (250 1050))
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rect(l4 (-250 300) (250 1050))
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rect(l8 (250 1050) (200 200))
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rect(l11 (-300 -300) (400 400))
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text(l12 A (-200 -200))
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)
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net(3
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rect(l8 (1300 300) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l8 (-200 650) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l11 (-250 -2150) (300 900))
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rect(l11 (-300 -900) (300 850))
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rect(l11 (-300 500) (300 900))
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rect(l11 (-300 -900) (300 850))
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rect(l6 (-400 -2200) (500 900))
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rect(l6 (-500 450) (500 900))
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)
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net(4 name(OUT)
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rect(l8 (2050 300) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 650) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-950 2000) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 -200) (200 200))
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rect(l11 (500 -5350) (300 850))
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rect(l11 (-300 -50) (300 1950))
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rect(l11 (-300 -1400) (300 850))
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rect(l11 (-300 300) (450 400))
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rect(l11 (-1200 -300) (1050 300))
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rect(l11 (-1050 1150) (300 1400))
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rect(l11 (-300 -2700) (300 1950))
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text(l12 OUT (700 -2000))
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rect(l2 (-1100 1300) (500 1500))
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rect(l6 (250 -5500) (450 900))
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rect(l6 (-450 450) (450 900))
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)
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net(5 name(VDD)
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rect(l3 (0 2950) (3750 3200))
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rect(l8 (-3200 -1800) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (1300 -1200) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (700 -800) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l11 (-2650 -1200) (300 1600))
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rect(l11 (1200 -1600) (300 1600))
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rect(l11 (600 -1200) (300 1200))
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rect(l13 (-2650 -800) (200 200))
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rect(l13 (-200 300) (200 200))
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rect(l13 (1300 -700) (200 200))
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rect(l13 (-200 300) (200 200))
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rect(l13 (700 -700) (200 200))
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rect(l13 (-200 300) (200 200))
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rect(l14 (-3150 -850) (3750 1000))
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text(l15 VDD (-100 -850))
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rect(l2 (-3200 -850) (450 1500))
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rect(l2 (1000 -1500) (450 1500))
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rect(l9 (400 -1200) (600 1200))
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)
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net(6 name(VSS)
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rect(l8 (550 1650) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (-200 -2050) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l8 (2200 -550) (200 200))
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rect(l8 (-200 300) (200 200))
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rect(l11 (-2650 -50) (300 1350))
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rect(l11 (-300 -2400) (300 1050))
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rect(l11 (2100 -1050) (300 1200))
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rect(l13 (-2650 -1100) (200 200))
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rect(l13 (-200 300) (200 200))
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rect(l13 (2200 -700) (200 200))
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rect(l13 (-200 300) (200 200))
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rect(l14 (-3150 -850) (3750 1000))
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text(l15 VSS (-100 -850))
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rect(l6 (-3200 1400) (450 900))
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rect(l6 (-450 -2250) (450 900))
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rect(l10 (1850 -900) (600 1200))
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)
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# Outgoing pins and their connections to nets
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pin(1 name(B))
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pin(2 name(A))
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pin(4 name(OUT))
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pin(5 name(VDD))
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pin(6 name(VSS))
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# Devices and their connections
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device(1 D$PMOS
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location(1025 4950)
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param(L 0.25)
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param(W 1.5)
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param(AS 0.675)
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param(AD 0.375)
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param(PS 3.9)
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param(PD 2)
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terminal(S 5)
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terminal(G 1)
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terminal(D 4)
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terminal(B 5)
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)
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device(2 D$PMOS$1
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location(1775 4950)
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param(L 0.25)
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param(W 1.5)
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param(AS 0.375)
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param(AD 0.675)
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param(PS 2)
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param(PD 3.9)
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terminal(S 4)
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terminal(G 2)
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terminal(D 5)
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terminal(B 5)
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)
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device(3 D$NMOS
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device(D$NMOS location(0 -1350))
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connect(0 S S)
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connect(1 S S)
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connect(0 G G)
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connect(1 G G)
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connect(0 D D)
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connect(1 D D)
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connect(0 B B)
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connect(1 B B)
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location(1025 2000)
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param(L 0.25)
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param(W 1.8)
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param(AS 0.81)
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param(AD 0.45)
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param(PS 5.4)
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param(PD 2.8)
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terminal(S 6)
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terminal(G 1)
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terminal(D 3)
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terminal(B 6)
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)
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device(4 D$NMOS$1
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device(D$NMOS$1 location(0 -1350))
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connect(0 S S)
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connect(1 S S)
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connect(0 G G)
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connect(1 G G)
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connect(0 D D)
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connect(1 D D)
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connect(0 B B)
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connect(1 B B)
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location(1775 2000)
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param(L 0.25)
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param(W 1.8)
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param(AS 0.45)
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param(AD 0.81)
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param(PS 2.8)
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param(PD 5.4)
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terminal(S 3)
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terminal(G 2)
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terminal(D 4)
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terminal(B 6)
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)
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)
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)
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# Reference netlist
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reference(
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# Device class section
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class(PMOS MOS4)
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class(NMOS MOS4)
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(NAND2_WITH_DIODES
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# Nets
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net(1 name(A))
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net(2 name(B))
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net(3 name(OUT))
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net(4 name(VSS))
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net(5 name(VDD))
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net(6 name($1))
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# Outgoing pins and their connections to nets
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pin(1 name(A))
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pin(2 name(B))
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pin(3 name(OUT))
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pin(4 name(VSS))
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pin(5 name(VDD))
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# Devices and their connections
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device(1 PMOS
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name('1')
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param(L 0.25)
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param(W 1.5)
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param(AS 0)
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param(AD 0)
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param(PS 0)
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param(PD 0)
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terminal(S 3)
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terminal(G 2)
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terminal(D 5)
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terminal(B 5)
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)
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device(2 PMOS
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name('2')
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param(L 0.25)
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param(W 1.5)
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param(AS 0)
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param(AD 0)
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param(PS 0)
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param(PD 0)
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terminal(S 3)
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terminal(G 1)
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terminal(D 5)
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terminal(B 5)
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)
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device(3 NMOS
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name('3')
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param(L 0.25)
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param(W 1.8)
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param(AS 0)
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param(AD 0)
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param(PS 0)
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param(PD 0)
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terminal(S 6)
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terminal(G 2)
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terminal(D 4)
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terminal(B 4)
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)
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device(4 NMOS
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name('4')
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param(L 0.25)
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param(W 1.8)
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param(AS 0)
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param(AD 0)
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param(PS 0)
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param(PD 0)
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terminal(S 3)
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terminal(G 1)
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terminal(D 6)
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terminal(B 4)
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)
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)
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)
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# Cross reference
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xref(
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circuit(NAND2_WITH_DIODES NAND2_WITH_DIODES match
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xref(
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net(3 6 match)
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net(2 1 match)
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net(1 2 match)
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net(4 3 match)
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net(5 5 match)
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net(6 4 match)
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pin(1 0 match)
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pin(0 1 match)
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pin(2 2 match)
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pin(3 4 match)
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pin(4 3 match)
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device(3 3 match)
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device(4 4 match)
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device(1 1 match)
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device(2 2 match)
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)
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)
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)
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