mirror of https://github.com/KLayout/klayout.git
119 lines
1.9 KiB
Plaintext
119 lines
1.9 KiB
Plaintext
#%lvsdb-klayout
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# Layout
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layout(
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top(Rre)
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unit(0.001)
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# Layer section
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# This section lists the mask layers (drawing or derived) and their connections.
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# Mask layers
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layer(l3 '15/0')
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layer(l4 '16/3')
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layer(l1)
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# Mask layer connectivity
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connect(l3 l3 l1)
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connect(l4 l1)
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connect(l1 l3 l4 l1)
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# Device class section
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class(RR1 RES
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param(L 1 0)
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param(W 1 0)
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)
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# Device abstracts section
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# Device abstracts list the pin shapes of the devices.
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device(D$RR1 RR1
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terminal(A
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rect(l1 (-3160 -300) (160 600))
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)
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terminal(B
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rect(l1 (3000 -300) (160 600))
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)
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)
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(Rre
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# Circuit boundary
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rect((5270 1210) (6320 600))
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# Nets with their geometries
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net(1 name('gnd!')
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rect(l3 (5295 1230) (120 560))
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text(l4 'gnd!' (-60 -60))
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rect(l1 (-70 -505) (125 570))
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rect(l1 (-140 -585) (160 600))
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)
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net(2 name('vdd!')
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rect(l3 (11455 1240) (120 540))
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text(l4 'vdd!' (-65 -60))
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rect(l1 (-65 -495) (125 560))
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rect(l1 (-140 -575) (160 600))
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)
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# Outgoing pins and their connections to nets
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pin(1 name('gnd!'))
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pin(2 name('vdd!'))
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# Devices and their connections
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device(1 D$RR1
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location(8430 1510)
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param(R 10)
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param(L 6)
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param(W 0.6)
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param(A 3.6)
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param(P 13.2)
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terminal(A 1)
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terminal(B 2)
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)
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)
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)
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# Reference netlist
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reference(
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# Device class section
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class(RR1 RES)
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# Circuit section
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# Circuits are the hierarchical building blocks of the netlist.
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circuit(RRE
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# Nets
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net(1 name('VDD!'))
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net(2 name('GND!'))
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# Devices and their connections
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device(1 RR1
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name(R0)
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param(R 10)
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param(L 6)
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param(W 0.6)
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param(A 0)
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param(P 0)
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terminal(A 1)
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terminal(B 2)
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)
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)
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)
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# Cross reference
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xref(
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circuit(Rre RRE match
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xref(
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net(1 2 match)
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net(2 1 match)
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pin(0 () match)
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pin(1 () match)
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device(1 1 match)
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)
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)
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)
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