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1235 Commits

Author SHA1 Message Date
Matthias Koefferlein b391b4510f WIP: can compare empty circuits now 
Empty circuits play a role as abstracts. They
are compared by using the pin names the nets
are attached to. The implementation change is:
* nodes without device terminals or subcircuit pins
  are compared through their net properties (count
  and name of pins attached)
* some enhancements of the net string serializer
  have been made to account for pin name mismatches.
 2019-03-31 09:53:51 +02:00
Matthias Koefferlein 2452c72d2d WIP: netlist compare deployed for netlist extractors 
Some enhancements were required:
* Clusters left over from joined clusters must not be
  turned into nets: this leads to dummy nets.
* null Nets can happen as targets of edges. Don't assert
  in this case but treat null nets as identical for both
  netlists.
* Don't resolve ambiguous nets if there are options to
  do this non-ambiguously.
* logger can be null
* Added compare_netlists to dbTestSupport
 2019-03-30 23:04:57 +01:00
Matthias Koefferlein f06d435b05 WIP: netlist comparer - moved into it's own files. 2019-03-29 00:37:45 +01:00
Matthias Koefferlein e8d59504dd WIP: netlist compare - forced matching of circuits. 2019-03-29 00:13:13 +01:00
Matthias Koefferlein d255617051 WIP: netlist compare - tests for device class equivalence mapping, added Netlist#device_class_by_name 2019-03-28 18:01:22 +01:00
Matthias Koefferlein cefd6e91cf WIP: some refactoring, netlist compare. Goal: support explicit device class and circuit mapping. 2019-03-27 23:17:35 +01:00
Matthias Koefferlein b44a55d901 WIP: netlist compare - pin swapping. 2019-03-26 23:38:36 +01:00
Matthias Koefferlein 46cd80d606 WIP: netlist compare - terminal swapping of devices. 2019-03-26 22:05:08 +01:00
Matthias Koefferlein e0cb3f6303 WIP: netlist compare - subcircuit matching enhanced. 2019-03-26 20:54:49 +01:00
Matthias Koefferlein 93d2341bc7 WIP: netlist compare 2019-03-26 00:10:10 +01:00
Matthias Koefferlein fec2348d97 WIP: Net compare. 2019-03-25 23:26:46 +01:00
Matthias Koefferlein 1a30a3919d WIP: Net compare with subcircuits. 2019-03-25 22:14:16 +01:00
Matthias Koefferlein 55052038ea WIP: netlist compare 2019-03-24 21:14:08 +01:00
Matthias Koefferlein bb2d3765b8 WIP: netlist compare, ambiguous net resolution, device mapping. 2019-03-24 00:45:58 +01:00
Matthias Koefferlein 25b7ab9dab WIP: netlist comparer 2019-03-23 10:31:29 +01:00
Matthias Koefferlein e424a88c90 WIP: netlist compare algo 
1.) Can identify transistor netlists without subcircuits
2.) Ambiguities stay unresolved

Next steps: assign ambiguous nets one by one and continue
in case of ambiguitites.
 2019-03-21 22:13:23 +01:00
Matthias Koefferlein c568838bbe WIP: netlist compare 2019-03-20 23:00:43 +01:00
Matthias Koefferlein 2d4f23abd1 Updated tests. 2019-03-19 00:08:47 +01:00
Matthias Koefferlein d7eb9162ce WIP: unified to_string/to_parsable_string of db::Netlist, step 1 2019-03-18 19:28:20 +01:00
Matthias Koefferlein e4078ca750 String serialization for netlists. 2019-03-18 02:00:33 +01:00
matthias e361a528a9 DRC layer's flatten now returns a proper DRCLayer object, enabled flat layers to become input also for deep mode L2N 2019-03-13 16:14:27 +01:00
Matthias Koefferlein 15040101ec Fixed a small issue in the adjust cell origin dialog. 2019-03-10 22:38:27 +01:00
Matthias Koefferlein 41fdd74189 Custom devices for device extractor - tests in the DRC framework 2019-03-10 22:37:32 +01:00
Matthias Koefferlein 510c675d21 Test cases for DRC-based net extraction and flat extraction 
Flat extraction requires that texts of subcells are not
considered. Otherwise they pollute the net namespace of
the top cell.
 2019-03-10 19:35:13 +01:00
Matthias Koefferlein ab8107de2d Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS 2019-03-10 01:26:52 +01:00
Matthias Koefferlein 5ea8c56db3 A minor doc fix. 2019-03-09 23:23:45 +01:00
Matthias Koefferlein 37cc84908e Updated test because of edge pair normlization 2019-03-09 20:25:45 +01:00
Matthias Koefferlein 6932977273 A few bug fixes and test updates 
- edge pairs are normalized before turning them into polygons.
  This makes flat and deep implementation more consistent.
- deep region and flat regions were not cooperating in geo
  checks
- unnamed layers are not registered in make_layer - this
  does not make sense and will just hold a fake ref
- tests now use GDS to represent texts after transformation
  (with orientation, OASIS can't do this)
- texts are more consistently handled in the tests
- test debug output is not written in the same format
  than golden data unless special normalization is
  requested.
- a non-orientable polygon was converted to orientable in
  a text because this can be represented in GDS consistently
- DRC testsuite uses "polygons" instead of "input" to achieve
  identical behavior for deep and flat mode with respect to
  texts
- dbRegionTests are updated because texts are not allowed
  for non-original layers too
 2019-03-09 19:40:38 +01:00
Matthias Koefferlein 745696507f Two bug fixes in DRC related to flatten: 
- Merge semantics wasn't transferred to flat region
- Merge semantics wasn't set at all in deep region
 2019-03-09 09:59:23 +01:00
Matthias Koefferlein bcc506adc6 Updated DRC doc. 2019-03-06 07:55:20 +01:00
Matthias Koefferlein b30a9278d6 WIP: updated test cases. 2019-03-06 07:41:44 +01:00
Matthias Koefferlein 8b29b30ff9 WIP: more consistent text handling 
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.

However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.

The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.

A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
 2019-03-06 00:34:56 +01:00
Matthias Koefferlein c07d7e92d4 Fixed three compiler warnings. 2019-03-04 17:58:40 +01:00
Matthias Koefferlein bacd565d05 Bugfix: Spice writer added one pin too much to MOS4 transistors. 2019-03-04 17:26:35 +01:00
Matthias Koefferlein 604a634bf1 Generalization of layout index for LayoutToNetlist 2019-03-03 18:10:52 +01:00
Matthias Koefferlein 49621aa13a Fixed some documentation issues, DRC doc updated. 2019-03-03 10:17:54 +01:00
Matthias Koefferlein b9127a93bf Build issue fixed. 2019-03-02 17:35:15 +01:00
Matthias Koefferlein d7cb2913c9 Fixed a problem with the documentation generator. 2019-03-02 17:22:27 +01:00
Matthias Koefferlein 32c44a8693 Fixed some unit tests by cleaning up resources properly. 2019-03-02 12:10:10 +01:00
Matthias Koefferlein 9c75ee8c92 Added DRC tests for antenna check. 2019-03-02 11:23:40 +01:00
Matthias Koefferlein 5c9b652771 Integration of LayoutToNetlist into DRC framework ('Netter') 
First steps are made towards providing an antenna check
 2019-03-02 10:41:16 +01:00
Matthias Koefferlein 261fb027fd GSI binding of antenna check function + tests. 2019-03-02 00:38:51 +01:00
Matthias Koefferlein 8d3b94201e Antenna check: tests added, 'catchall' diode protection 2019-03-01 23:07:28 +01:00
Matthias Koefferlein 9f4f2d58d7 First version of antenna check. 2019-02-28 23:56:49 +01:00
Matthias Koefferlein f83278207c WIP: don't keep a reference to DeepLayer inside DeepShapeStore - that's against the design. 2019-02-28 22:42:40 +01:00
Matthias Koefferlein 4035c804b7 WIP: fixed bugs, added tests. 2019-02-28 22:23:20 +01:00
Matthias Koefferlein fccdee5186 WIP: provisions for DRC/network extractor integration. 2019-02-28 00:55:06 +01:00
Matthias Koefferlein 36a3540e16 Allow empty regions for device extractor. 2019-02-25 23:51:21 +01:00
Matthias Koefferlein 21ea37f747 Updated test golden data. 2019-02-25 22:52:37 +01:00
Matthias Koefferlein 9b31bd3214 Fixed crash by introducing a new scheme for storing cluster refs 
The previous implementation was based on the Instance
pointers, but these got invalidated during device cell
construction. Now an explicit copy of the instance is
kept.
 2019-02-25 22:36:24 +01:00