Merge pull request #357 from KLayout/issue-352

Fixed #352 (LVS should ignore equivalent_pins line for non-existing c…
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Matthias Köfferlein 2019-09-16 23:36:02 +02:00 committed by GitHub
commit f5ce24066e
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3 changed files with 42 additions and 28 deletions

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@ -220,17 +220,19 @@ module LVS
( nl_a, nl_b ) = _ensure_two_netlists ( nl_a, nl_b ) = _ensure_two_netlists
if ca.is_a?(String) if ca.is_a?(String)
circuit_a = nl_a.circuit_by_name(ca) || raise("Not a valid circuit name in extracted netlist: #{ca}") circuit_a = nl_a.circuit_by_name(ca)
else else
circuit_a = ca circuit_a = ca
end end
if cb.is_a?(String) if cb.is_a?(String)
circuit_b = nl_b.circuit_by_name(cb) || raise("Not a valid circuit name in reference netlist: #{cb}") circuit_b = nl_b.circuit_by_name(cb)
else else
circuit_b = cb circuit_b = cb
end end
if circuit_a && circuit_b
if a.is_a?(String) if a.is_a?(String)
net_a = circuit_a.net_by_name(a) || raise("Not a valid net name in extracted netlist: #{a} (for circuit #{circuit_a})") net_a = circuit_a.net_by_name(a) || raise("Not a valid net name in extracted netlist: #{a} (for circuit #{circuit_a})")
else else
@ -238,12 +240,16 @@ module LVS
end end
if b.is_a?(String) if b.is_a?(String)
net_b = circuit_b.net_by_name(b) || raise("Not a valid net name in reference netlist: #{b} (for circuit #{circuit_b})") net_b = circuit_b.net_by_name(b) || raise("Not a valid net name in extracted netlist: #{b} (for circuit #{circuit_b})")
else else
net_b = b net_b = b
end end
if net_a && net_b
@comparer.same_nets(net_a, net_b) @comparer.same_nets(net_a, net_b)
end
end
end end
@ -267,10 +273,12 @@ module LVS
( nl_a, nl_b ) = _ensure_two_netlists ( nl_a, nl_b ) = _ensure_two_netlists
circuit_a = a && (nl_a.circuit_by_name(a) || raise("Not a valid circuit name in extracted netlist: #{a}")) circuit_a = a && nl_a.circuit_by_name(a)
circuit_b = b && (nl_b.circuit_by_name(b) || raise("Not a valid circuit name in reference netlist: #{b}")) circuit_b = b && nl_b.circuit_by_name(b)
if circuit_a && circuit_b
@comparer.same_circuits(circuit_a, circuit_b) @comparer.same_circuits(circuit_a, circuit_b)
end
end end
@ -341,7 +349,8 @@ module LVS
( nl_a, nl_b ) = _ensure_two_netlists ( nl_a, nl_b ) = _ensure_two_netlists
circuit_b = nl_b.circuit_by_name(circuit) || raise("Not a valid circuit name in reference netlist: #{circuit}") circuit_b = nl_b.circuit_by_name(circuit)
if circuit_b
pins_by_index = [] pins_by_index = []
circuit_b.each_pin { |p| pins_by_index << p } circuit_b.each_pin { |p| pins_by_index << p }
@ -359,6 +368,8 @@ module LVS
end end
end
# %LVS% # %LVS%
# @name schematic # @name schematic
# @brief Gets, sets or reads the reference netlist # @brief Gets, sets or reads the reference netlist

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@ -70,7 +70,9 @@ connect_global(ptie, "SUBSTRATE")
same_circuits("top", "RINGO") same_circuits("top", "RINGO")
same_circuits("INV", "INVX1") same_circuits("INV", "INVX1")
same_circuits("DOESNOTEXIST", "DOESNOTEXIST2")
same_nets("top", "ENABLE", "RINGO", "ENABLE") same_nets("top", "ENABLE", "RINGO", "ENABLE")
same_nets("DOESNOTEXIST", "ENABLE", "DOESNOTEXIST2", "ENABLE")
netlist.simplify netlist.simplify

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@ -69,6 +69,7 @@ connect_global(ptie, "SUBSTRATE")
# Compare section # Compare section
equivalent_pins("ND2X1", 4, 5) equivalent_pins("ND2X1", 4, 5)
equivalent_pins("DOESNOTEXIST", 4, 5)
netlist.simplify netlist.simplify