mirror of https://github.com/KLayout/klayout.git
Merge pull request #357 from KLayout/issue-352
Fixed #352 (LVS should ignore equivalent_pins line for non-existing c…
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f5ce24066e
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@ -220,17 +220,19 @@ module LVS
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( nl_a, nl_b ) = _ensure_two_netlists
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( nl_a, nl_b ) = _ensure_two_netlists
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if ca.is_a?(String)
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if ca.is_a?(String)
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circuit_a = nl_a.circuit_by_name(ca) || raise("Not a valid circuit name in extracted netlist: #{ca}")
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circuit_a = nl_a.circuit_by_name(ca)
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else
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else
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circuit_a = ca
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circuit_a = ca
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end
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end
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if cb.is_a?(String)
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if cb.is_a?(String)
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circuit_b = nl_b.circuit_by_name(cb) || raise("Not a valid circuit name in reference netlist: #{cb}")
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circuit_b = nl_b.circuit_by_name(cb)
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else
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else
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circuit_b = cb
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circuit_b = cb
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end
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end
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if circuit_a && circuit_b
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if a.is_a?(String)
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if a.is_a?(String)
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net_a = circuit_a.net_by_name(a) || raise("Not a valid net name in extracted netlist: #{a} (for circuit #{circuit_a})")
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net_a = circuit_a.net_by_name(a) || raise("Not a valid net name in extracted netlist: #{a} (for circuit #{circuit_a})")
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else
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else
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@ -238,12 +240,16 @@ module LVS
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end
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end
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if b.is_a?(String)
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if b.is_a?(String)
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net_b = circuit_b.net_by_name(b) || raise("Not a valid net name in reference netlist: #{b} (for circuit #{circuit_b})")
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net_b = circuit_b.net_by_name(b) || raise("Not a valid net name in extracted netlist: #{b} (for circuit #{circuit_b})")
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else
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else
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net_b = b
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net_b = b
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end
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end
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if net_a && net_b
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@comparer.same_nets(net_a, net_b)
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@comparer.same_nets(net_a, net_b)
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end
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end
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end
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end
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@ -267,10 +273,12 @@ module LVS
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( nl_a, nl_b ) = _ensure_two_netlists
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( nl_a, nl_b ) = _ensure_two_netlists
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circuit_a = a && (nl_a.circuit_by_name(a) || raise("Not a valid circuit name in extracted netlist: #{a}"))
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circuit_a = a && nl_a.circuit_by_name(a)
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circuit_b = b && (nl_b.circuit_by_name(b) || raise("Not a valid circuit name in reference netlist: #{b}"))
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circuit_b = b && nl_b.circuit_by_name(b)
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if circuit_a && circuit_b
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@comparer.same_circuits(circuit_a, circuit_b)
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@comparer.same_circuits(circuit_a, circuit_b)
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end
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end
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end
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@ -341,7 +349,8 @@ module LVS
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( nl_a, nl_b ) = _ensure_two_netlists
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( nl_a, nl_b ) = _ensure_two_netlists
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circuit_b = nl_b.circuit_by_name(circuit) || raise("Not a valid circuit name in reference netlist: #{circuit}")
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circuit_b = nl_b.circuit_by_name(circuit)
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if circuit_b
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pins_by_index = []
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pins_by_index = []
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circuit_b.each_pin { |p| pins_by_index << p }
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circuit_b.each_pin { |p| pins_by_index << p }
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@ -359,6 +368,8 @@ module LVS
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end
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end
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end
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# %LVS%
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# %LVS%
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# @name schematic
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# @name schematic
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# @brief Gets, sets or reads the reference netlist
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# @brief Gets, sets or reads the reference netlist
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@ -70,7 +70,9 @@ connect_global(ptie, "SUBSTRATE")
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same_circuits("top", "RINGO")
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same_circuits("top", "RINGO")
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same_circuits("INV", "INVX1")
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same_circuits("INV", "INVX1")
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same_circuits("DOESNOTEXIST", "DOESNOTEXIST2")
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same_nets("top", "ENABLE", "RINGO", "ENABLE")
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same_nets("top", "ENABLE", "RINGO", "ENABLE")
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same_nets("DOESNOTEXIST", "ENABLE", "DOESNOTEXIST2", "ENABLE")
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netlist.simplify
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netlist.simplify
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@ -69,6 +69,7 @@ connect_global(ptie, "SUBSTRATE")
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# Compare section
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# Compare section
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equivalent_pins("ND2X1", 4, 5)
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equivalent_pins("ND2X1", 4, 5)
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equivalent_pins("DOESNOTEXIST", 4, 5)
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netlist.simplify
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netlist.simplify
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