Added DRC full scale tests, first is Greyhound with M1 IHP fill

This commit is contained in:
Matthias Koefferlein 2025-07-12 22:02:44 +02:00
parent e7bc997e9f
commit a6a012beac
5 changed files with 129 additions and 0 deletions

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@ -0,0 +1,70 @@
/*
KLayout Layout Viewer
Copyright (C) 2006-2025 Matthias Koefferlein
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "tlUnitTest.h"
#include "dbReader.h"
#include "dbTestSupport.h"
#include "lymMacro.h"
TEST(1_IHPMetal1Fill)
{
test_is_long_runner ();
std::string rs = tl::testdata ();
rs += "/drc/drcFullTest_1.drc";
std::string input = tl::testdata ();
input += "/drc/drcFullTest_1.oas";
std::string au = tl::testdata ();
au += "/drc/drcFullTest_au1.oas";
std::string output = this->tmp_file ("tmp.oas");
{
// Set some variables
lym::Macro config;
config.set_text (tl::sprintf (
"$drc_force_gc = true\n"
"$drc_test_source = '%s'\n"
"$drc_test_target = '%s'\n"
, input, output)
);
config.set_interpreter (lym::Macro::Ruby);
EXPECT_EQ (config.run (), 0);
}
lym::Macro drc;
drc.load_from (rs);
EXPECT_EQ (drc.run (), 0);
db::Layout layout;
{
tl::InputStream stream (output);
db::Reader reader (stream);
reader.read (layout);
}
db::compare_layouts (_this, layout, au, db::NoNormalization);
}

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@ -10,6 +10,7 @@ SOURCES = \
drcBasicTests.cc \
drcGenericTests.cc \
drcSimpleTests.cc \
drcFullTests.cc \
drcSuiteTests.cc \
INCLUDEPATH += $$DRC_INC $$TL_INC $$RDB_INC $$DB_INC $$GSI_INC $$LYM_INC

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testdata/drc/drcFullTest_1.drc vendored Normal file
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source($drc_test_source)
target($drc_test_target)
verbose
ncpu = 4
chip = input(189, 4)
chip.output(189, 4)
# NOTE: this must not happen in tiled mode as the sealring
# is only visible as a whole in flat mode
sealring = source.cell("sealring")
metal1_seal = sealring.input(8, 0)
metal1_seal_inner = metal1_seal.holes
# NOTE: metal1_seal_outer is empty if there is no sealring ->
# the full chip will be filled
metal1_seal_outer = chip.interacting(metal1_seal_inner) - metal1_seal_inner
# Everything else can be done in tiled mode
tiles(500)
tile_borders(2.0)
threads(ncpu)
metal1 = input(8, 0)
metal1.output(8, 0)
metal1_fill = input(8, 22)
metal1_nofill = input(8, 23) + metal1_seal_outer
metal1_dist = 0.42
min_space_to_fill = 1.0
pattern = fill_pattern("METAL1_FILL1")
pattern.shape(8, 22, box(0.0, 0.0, 5.0, 5.0))
pattern.dim(5.0, 5.0)
pattern.margin(metal1_dist, metal1_dist)
to_fill = chip - metal1_nofill - metal1
to_fill = to_fill.fill_with_left(pattern, hstep(7.0, 0), vstep(1.5, 7.0), multi_origin)
pattern = fill_pattern("METAL1_FILL2")
pattern.shape(8, 22, box(0.0, 0.0, 2.0, 2.0))
pattern.dim(2.0, 2.0)
pattern.margin(metal1_dist, metal1_dist)
to_fill = to_fill.fill_with_left(pattern, hstep(2.42, 0), vstep(0.65, 2.42), multi_origin)
pattern = fill_pattern("METAL1_FILL3")
pattern.shape(8, 22, box(0.0, 0.0, 1.2, 1.2))
pattern.dim(1.2, 1.2)
pattern.margin(metal1_dist, metal1_dist)
to_fill = to_fill.fill_with_left(pattern, hstep(1.62, 0), vstep(0.3, 1.62), multi_origin)

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