mirror of https://github.com/KLayout/klayout.git
Added DRC full scale tests, first is Greyhound with M1 IHP fill
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/*
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KLayout Layout Viewer
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Copyright (C) 2006-2025 Matthias Koefferlein
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "tlUnitTest.h"
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#include "dbReader.h"
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#include "dbTestSupport.h"
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#include "lymMacro.h"
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TEST(1_IHPMetal1Fill)
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{
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test_is_long_runner ();
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std::string rs = tl::testdata ();
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rs += "/drc/drcFullTest_1.drc";
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std::string input = tl::testdata ();
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input += "/drc/drcFullTest_1.oas";
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std::string au = tl::testdata ();
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au += "/drc/drcFullTest_au1.oas";
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std::string output = this->tmp_file ("tmp.oas");
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{
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// Set some variables
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lym::Macro config;
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config.set_text (tl::sprintf (
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"$drc_force_gc = true\n"
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"$drc_test_source = '%s'\n"
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"$drc_test_target = '%s'\n"
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, input, output)
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);
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config.set_interpreter (lym::Macro::Ruby);
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EXPECT_EQ (config.run (), 0);
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}
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lym::Macro drc;
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drc.load_from (rs);
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EXPECT_EQ (drc.run (), 0);
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db::Layout layout;
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{
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tl::InputStream stream (output);
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db::Reader reader (stream);
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reader.read (layout);
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}
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db::compare_layouts (_this, layout, au, db::NoNormalization);
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}
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@ -10,6 +10,7 @@ SOURCES = \
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drcBasicTests.cc \
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drcGenericTests.cc \
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drcSimpleTests.cc \
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drcFullTests.cc \
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drcSuiteTests.cc \
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INCLUDEPATH += $$DRC_INC $$TL_INC $$RDB_INC $$DB_INC $$GSI_INC $$LYM_INC
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source($drc_test_source)
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target($drc_test_target)
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verbose
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ncpu = 4
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chip = input(189, 4)
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chip.output(189, 4)
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# NOTE: this must not happen in tiled mode as the sealring
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# is only visible as a whole in flat mode
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sealring = source.cell("sealring")
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metal1_seal = sealring.input(8, 0)
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metal1_seal_inner = metal1_seal.holes
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# NOTE: metal1_seal_outer is empty if there is no sealring ->
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# the full chip will be filled
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metal1_seal_outer = chip.interacting(metal1_seal_inner) - metal1_seal_inner
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# Everything else can be done in tiled mode
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tiles(500)
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tile_borders(2.0)
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threads(ncpu)
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metal1 = input(8, 0)
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metal1.output(8, 0)
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metal1_fill = input(8, 22)
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metal1_nofill = input(8, 23) + metal1_seal_outer
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metal1_dist = 0.42
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min_space_to_fill = 1.0
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pattern = fill_pattern("METAL1_FILL1")
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pattern.shape(8, 22, box(0.0, 0.0, 5.0, 5.0))
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pattern.dim(5.0, 5.0)
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pattern.margin(metal1_dist, metal1_dist)
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to_fill = chip - metal1_nofill - metal1
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to_fill = to_fill.fill_with_left(pattern, hstep(7.0, 0), vstep(1.5, 7.0), multi_origin)
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pattern = fill_pattern("METAL1_FILL2")
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pattern.shape(8, 22, box(0.0, 0.0, 2.0, 2.0))
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pattern.dim(2.0, 2.0)
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pattern.margin(metal1_dist, metal1_dist)
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to_fill = to_fill.fill_with_left(pattern, hstep(2.42, 0), vstep(0.65, 2.42), multi_origin)
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pattern = fill_pattern("METAL1_FILL3")
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pattern.shape(8, 22, box(0.0, 0.0, 1.2, 1.2))
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pattern.dim(1.2, 1.2)
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pattern.margin(metal1_dist, metal1_dist)
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to_fill = to_fill.fill_with_left(pattern, hstep(1.62, 0), vstep(0.3, 1.62), multi_origin)
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