Fixed issue #1877 (rounding introduces DRC error in LEF/DEF via)

src/plugins/streamers/lefdef/db_plugin/dbLEFDEFImporter.cc

@@ -223,8 +223,10 @@ RuleBasedViaGenerator::create_cell (LEFDEFReaderState &reader, Layout &layout, d
 
   //  NOTE: missing cuts due to pattern holes don't change mask assignment
 
-  db::Vector vs ((m_cutsize.x () * m_columns + m_cutspacing.x () * (m_columns - 1)) / 2, (m_cutsize.y () * m_rows + m_cutspacing.y () * (m_rows - 1)) / 2);
-  db::Box via_box (m_offset - vs, m_offset + vs);
+  //  special rounding to ensure the dimensions are correct for non-even width or height (issue #1877)
+  db::Vector vs ((m_cutsize.x () * m_columns + m_cutspacing.x () * (m_columns - 1)), (m_cutsize.y () * m_rows + m_cutspacing.y () * (m_rows - 1)));
+  db::Point via_ll = m_offset - db::Vector (vs.x () / 2, vs.y () / 2);
+  db::Box via_box (via_ll, via_ll + vs);
 
   std::set <unsigned int> dl;
 

src/plugins/streamers/lefdef/unit_tests/dbLEFDEFImportTests.cc

@@ -1077,3 +1077,26 @@ TEST(213_no_duplicate_LEF)
   db::compare_layouts (_this, ly, fn_path + "au.oas", db::WriteOAS);
 }
 
+//  issue-1877 (VIA placement rounding)
+TEST(214_issue1877)
+{
+  db::Layout ly;
+
+  std::string fn_path (tl::testdata ());
+  fn_path += "/lefdef/issue-1877/";
+
+  db::LEFDEFReaderOptions lefdef_opt = default_options ();
+  lefdef_opt.set_map_file ("tech.map");
+  lefdef_opt.set_read_lef_with_def (true);
+  db::LoadLayoutOptions opt;
+  opt.set_options (lefdef_opt);
+
+  {
+    tl::InputStream is (fn_path + "test.def");
+    db::Reader reader (is);
+    reader.read (ly, opt);
+  }
+
+  db::compare_layouts (_this, ly, fn_path + "au.oas", db::WriteOAS);
+}
+

testdata/lefdef/issue-1877/tech.lef

@@ -0,0 +1,27 @@
+VERSION 5.6 ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+ 
+UNITS
+  DATABASE MICRONS 1000 ;
+END UNITS
+MANUFACTURINGGRID 0.001 ;
+ 
+LAYER METAL_1
+  TYPE ROUTING ;
+  DIRECTION HORIZONTAL ;
+    WIDTH 0.6 ;
+END METAL_1
+
+LAYER VIA_1
+  TYPE CUT ;
+END VIA_1
+
+LAYER METAL_2
+  TYPE ROUTING ;
+  DIRECTION VERTICAL ;
+    WIDTH 0.6 ;
+END METAL_2 
+
+END LIBRARY
+

testdata/lefdef/issue-1877/tech.map

@@ -0,0 +1,4 @@
+DIEAREA ALL 1 0
+METAL_1 ALL 2 0
+VIA_1 ALL 3 0
+METAL_2 ALL 4 0

testdata/lefdef/issue-1877/test.def

@@ -0,0 +1,21 @@
+VERSION 5.8 ;
+DIVIDERCHAR "/" ;
+BUSBITCHARS "[]" ;
+DESIGN dummy_design ;
+UNITS DISTANCE MICRONS 1000 ;
+
+DIEAREA ( 21500 7000 ) ( 26000 9000 ) ;
+
+VIAS 1 ;
+    - via1_2_XXXX_XXX_X_X_XXX_XXX + VIARULE MYVIA1_ARRAY + CUTSIZE 246 246  + LAYERS METAL_1 VIA_1 METAL_2  + CUTSPACING 231 231  + ENCLOSURE 62 137 8 61  + ROWCOL 1 8  ;
+END VIAS
+ 
+ 
+SPECIALNETS 1 ;
+    - VDD 
+# ( PIN VDD ) ( * vdd ) 
+      + USE POWER
+      + ROUTED METAL_1 0 + SHAPE STRIPE ( 23620 7840 ) via1_2_XXXX_XXX_X_X_XXX_XXX ;
+END SPECIALNETS
+ 
+END DESIGN