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Fixed some compiler warnings.

This commit is contained in:
Matthias Koefferlein 2019-05-27 18:05:38 +02:00
parent 23aa79f8a7
commit 7b7e35d3d5
6 changed files with 58 additions and 64 deletions
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10
src/ant/ant/RulerConfigPage4.ui
View File

@ -89,7 +89,7 @@
<string>...</string> <string>...</string>
</property> </property>
<property name="icon"> <property name="icon">
<iconset resource="../lay/layResources.qrc"> <iconset resource="../../lay/lay/layResources.qrc">
<normaloff>:/up.png</normaloff>:/up.png</iconset> <normaloff>:/up.png</normaloff>:/up.png</iconset>
</property> </property>
</widget> </widget>
@ -103,7 +103,7 @@
<string>...</string> <string>...</string>
</property> </property>
<property name="icon"> <property name="icon">
<iconset resource="../lay/layResources.qrc"> <iconset resource="../../lay/lay/layResources.qrc">
<normaloff>:/add.png</normaloff>:/add.png</iconset> <normaloff>:/add.png</normaloff>:/add.png</iconset>
</property> </property>
</widget> </widget>
@ -117,7 +117,7 @@
<string>...</string> <string>...</string>
</property> </property>
<property name="icon"> <property name="icon">
<iconset resource="../lay/layResources.qrc"> <iconset resource="../../lay/lay/layResources.qrc">
<normaloff>:/del.png</normaloff>:/del.png</iconset> <normaloff>:/del.png</normaloff>:/del.png</iconset>
</property> </property>
</widget> </widget>
@ -131,7 +131,7 @@
<string>...</string> <string>...</string>
</property> </property>
<property name="icon"> <property name="icon">
<iconset resource="../lay/layResources.qrc"> <iconset resource="../../lay/lay/layResources.qrc">
<normaloff>:/down.png</normaloff>:/down.png</iconset> <normaloff>:/down.png</normaloff>:/down.png</iconset>
</property> </property>
</widget> </widget>
@ -866,7 +866,7 @@
<tabstop>t_snap_cbx</tabstop> <tabstop>t_snap_cbx</tabstop>
</tabstops> </tabstops>
<resources> <resources>
<include location="../lay/layResources.qrc"/> <include location="../../lay/lay/layResources.qrc"/>
</resources> </resources>
<connections/> <connections/>
</ui> </ui>

2
src/db/db/dbNetlistSpiceWriter.cc
View File

@ -197,7 +197,7 @@ std::string NetlistSpiceWriterDelegate::format_params (const db::Device &dev) co
// -------------------------------------------------------------------------------- // --------------------------------------------------------------------------------
NetlistSpiceWriter::NetlistSpiceWriter (NetlistSpiceWriterDelegate *delegate) NetlistSpiceWriter::NetlistSpiceWriter (NetlistSpiceWriterDelegate *delegate)
: mp_netlist (0), mp_stream (0), mp_delegate (delegate), m_use_net_names (false), m_next_net_id (0) : mp_netlist (0), mp_stream (0), mp_delegate (delegate), m_next_net_id (0), m_use_net_names (false)
{ {
static NetlistSpiceWriterDelegate std_delegate; static NetlistSpiceWriterDelegate std_delegate;
if (! delegate) { if (! delegate) {

54
src/db/db/gsiDeclDbLayoutToNetlist.cc
View File

@ -21,6 +21,7 @@
*/ */
#include "gsiDecl.h" #include "gsiDecl.h"
#include "gsiEnums.h"
#include "dbLayoutToNetlist.h" #include "dbLayoutToNetlist.h"
#include "tlStream.h" #include "tlStream.h"
#include "tlVariant.h" #include "tlVariant.h"
@ -65,34 +66,19 @@ static db::Cell *l2n_internal_top_cell (db::LayoutToNetlist *l2n)
return const_cast<db::Cell *> (l2n->internal_top_cell ()); return const_cast<db::Cell *> (l2n->internal_top_cell ());
} }
static int bnh_flatten () static void build_net (const db::LayoutToNetlist *l2n, const db::Net &net, db::Layout &target, db::Cell &target_cell, const std::map<unsigned int, const db::Region *> &lmap, const tl::Variant &netname_prop, db::LayoutToNetlist::BuildNetHierarchyMode hier_mode, const tl::Variant &circuit_cell_name_prefix, const tl::Variant &device_cell_name_prefix)
{
return int (db::LayoutToNetlist::BNH_Flatten);
}
static int bnh_disconnected ()
{
return int (db::LayoutToNetlist::BNH_Disconnected);
}
static int bnh_subcircuit_cells ()
{
return int (db::LayoutToNetlist::BNH_SubcircuitCells);
}
static void build_net (const db::LayoutToNetlist *l2n, const db::Net &net, db::Layout &target, db::Cell &target_cell, const std::map<unsigned int, const db::Region *> &lmap, const tl::Variant &netname_prop, int hier_mode, const tl::Variant &circuit_cell_name_prefix, const tl::Variant &device_cell_name_prefix)
{ {
std::string p = circuit_cell_name_prefix.to_string (); std::string p = circuit_cell_name_prefix.to_string ();
std::string dp = device_cell_name_prefix.to_string (); std::string dp = device_cell_name_prefix.to_string ();
l2n->build_net (net, target, target_cell, lmap, netname_prop, (db::LayoutToNetlist::BuildNetHierarchyMode) hier_mode, circuit_cell_name_prefix.is_nil () ? 0 : p.c_str (), device_cell_name_prefix.is_nil () ? 0 : dp.c_str ()); l2n->build_net (net, target, target_cell, lmap, netname_prop, hier_mode, circuit_cell_name_prefix.is_nil () ? 0 : p.c_str (), device_cell_name_prefix.is_nil () ? 0 : dp.c_str ());
} }
static void build_all_nets (const db::LayoutToNetlist *l2n, const db::CellMapping &cmap, db::Layout &target, const std::map<unsigned int, const db::Region *> &lmap, const tl::Variant &net_cell_name_prefix, const tl::Variant &netname_prop, int hier_mode, const tl::Variant &circuit_cell_name_prefix, const tl::Variant &device_cell_name_prefix) static void build_all_nets (const db::LayoutToNetlist *l2n, const db::CellMapping &cmap, db::Layout &target, const std::map<unsigned int, const db::Region *> &lmap, const tl::Variant &net_cell_name_prefix, const tl::Variant &netname_prop, db::LayoutToNetlist::BuildNetHierarchyMode hier_mode, const tl::Variant &circuit_cell_name_prefix, const tl::Variant &device_cell_name_prefix)
{ {
std::string cp = circuit_cell_name_prefix.to_string (); std::string cp = circuit_cell_name_prefix.to_string ();
std::string np = net_cell_name_prefix.to_string (); std::string np = net_cell_name_prefix.to_string ();
std::string dp = device_cell_name_prefix.to_string (); std::string dp = device_cell_name_prefix.to_string ();
l2n->build_all_nets (cmap, target, lmap, net_cell_name_prefix.is_nil () ? 0 : np.c_str (), netname_prop, (db::LayoutToNetlist::BuildNetHierarchyMode) hier_mode, circuit_cell_name_prefix.is_nil () ? 0 : cp.c_str (), device_cell_name_prefix.is_nil () ? 0 : dp.c_str ()); l2n->build_all_nets (cmap, target, lmap, net_cell_name_prefix.is_nil () ? 0 : np.c_str (), netname_prop, hier_mode, circuit_cell_name_prefix.is_nil () ? 0 : cp.c_str (), device_cell_name_prefix.is_nil () ? 0 : dp.c_str ());
} }
static std::vector<std::string> l2n_layer_names (const db::LayoutToNetlist *l2n) static std::vector<std::string> l2n_layer_names (const db::LayoutToNetlist *l2n)
@ -370,16 +356,7 @@ Class<db::LayoutToNetlist> decl_dbLayoutToNetlist ("db", "LayoutToNetlist",
"all subcircuits too.\n" "all subcircuits too.\n"
"\"prop_id\" is an optional properties ID. If given, this property set will be attached to the shapes." "\"prop_id\" is an optional properties ID. If given, this property set will be attached to the shapes."
) + ) +
gsi::constant ("BNH_Flatten", &bnh_flatten, gsi::method_ext ("build_net", &build_net, gsi::arg ("net"), gsi::arg ("target"), gsi::arg ("target_cell"), gsi::arg ("lmap"), gsi::arg ("netname_prop", tl::Variant (), "nil"), gsi::arg ("hier_mode", db::LayoutToNetlist::BNH_Flatten, "BNH_Flatten"), gsi::arg ("circuit_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("device_cell_name_prefix", tl::Variant (), "nil"),
"@brief This constant tells \\build_net and \\build_all_nets to flatten the nets (used for the \"hier_mode\" parameter)."
) +
gsi::constant ("BNH_Disconnected", &bnh_disconnected,
"@brief This constant tells \\build_net and \\build_all_nets to produce local nets without connections to subcircuits (used for the \"hier_mode\" parameter)."
) +
gsi::constant ("BNH_SubcircuitCells", &bnh_subcircuit_cells,
"@brief This constant tells \\build_net and \\build_all_nets to produce a hierarchy of subcircuit cells per net (used for the \"hier_mode\" parameter)."
) +
gsi::method_ext ("build_net", &build_net, gsi::arg ("net"), gsi::arg ("target"), gsi::arg ("target_cell"), gsi::arg ("lmap"), gsi::arg ("netname_prop", tl::Variant (), "nil"), gsi::arg ("hier_mode", int (db::LayoutToNetlist::BNH_Flatten), "BNH_Flatten"), gsi::arg ("circuit_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("device_cell_name_prefix", tl::Variant (), "nil"),
"@brief Builds a net representation in the given layout and cell\n" "@brief Builds a net representation in the given layout and cell\n"
"\n" "\n"
"This method puts the shapes of a net into the given target cell using a variety of options\n" "This method puts the shapes of a net into the given target cell using a variety of options\n"
@ -409,7 +386,7 @@ Class<db::LayoutToNetlist> decl_dbLayoutToNetlist ("db", "LayoutToNetlist",
"@param cell_name_prefix Chooses recursive mode if non-null\n" "@param cell_name_prefix Chooses recursive mode if non-null\n"
"@param device_cell_name_prefix See above\n" "@param device_cell_name_prefix See above\n"
) + ) +
gsi::method_ext ("build_all_nets", &build_all_nets, gsi::arg ("cmap"), gsi::arg ("target"), gsi::arg ("lmap"), gsi::arg ("net_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("netname_prop", tl::Variant (), "nil"), gsi::arg ("hier_mode", int (db::LayoutToNetlist::BNH_Flatten), "BNH_Flatten"), gsi::arg ("circuit_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("device_cell_name_prefix", tl::Variant (), "nil"), gsi::method_ext ("build_all_nets", &build_all_nets, gsi::arg ("cmap"), gsi::arg ("target"), gsi::arg ("lmap"), gsi::arg ("net_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("netname_prop", tl::Variant (), "nil"), gsi::arg ("hier_mode", db::LayoutToNetlist::BNH_Flatten, "BNH_Flatten"), gsi::arg ("circuit_cell_name_prefix", tl::Variant (), "nil"), gsi::arg ("device_cell_name_prefix", tl::Variant (), "nil"),
"@brief Builds a full hierarchical representation of the nets\n" "@brief Builds a full hierarchical representation of the nets\n"
"\n" "\n"
"This method copies all nets into cells corresponding to the circuits. It uses the cmap\n" "This method copies all nets into cells corresponding to the circuits. It uses the cmap\n"
@ -571,4 +548,21 @@ Class<db::LayoutToNetlist> decl_dbLayoutToNetlist ("db", "LayoutToNetlist",
"This class has been introduced in version 0.26." "This class has been introduced in version 0.26."
); );
gsi::EnumIn<db::LayoutToNetlist, db::LayoutToNetlist::BuildNetHierarchyMode> decl_dbLayoutToNetlist_BuildNetHierarchyMode ("db", "BuildNetHierarchyMode",
gsi::enum_const ("BNH_Flatten", db::LayoutToNetlist::BNH_Flatten,
"@brief This constant tells \\build_net and \\build_all_nets to flatten the nets (used for the \"hier_mode\" parameter)."
) +
gsi::enum_const ("BNH_Disconnected", db::LayoutToNetlist::BNH_Disconnected,
"@brief This constant tells \\build_net and \\build_all_nets to produce local nets without connections to subcircuits (used for the \"hier_mode\" parameter)."
) +
gsi::enum_const ("BNH_SubcircuitCells", db::LayoutToNetlist::BNH_SubcircuitCells,
"@brief This constant tells \\build_net and \\build_all_nets to produce a hierarchy of subcircuit cells per net (used for the \"hier_mode\" parameter)."
),
"@brief This class represents the LayoutToNetlist::BuildNetHierarchyMode enum\n"
"This enum is used for \\LayoutToNetlist#build_all_nets and \\LayoutToNetlist#build_net."
);
// Inject the NetlistCrossReference::Status declarations into NetlistCrossReference:
gsi::ClassExt<db::LayoutToNetlist> inject_dbLayoutToNetlist_BuildNetHierarchyMode_in_parent (decl_dbLayoutToNetlist_BuildNetHierarchyMode.defs ());
} }

2
src/lay/lay/layMacroEditorPage.cc
View File

@ -684,7 +684,7 @@ void MacroEditorPage::cursor_position_changed ()
for (int p = t.size (); p > 0 && found < 0; ) { for (int p = t.size (); p > 0 && found < 0; ) {
--p; --p;
if (p + int (e->start_offset) < pos) { if (p + int (e->start_offset) < int (pos)) {
QString c = t.mid (p, 1); QString c = t.mid (p, 1);
if (c == close_rbracket) { if (c == close_rbracket) {
bs.push_back (open_rbracket); bs.push_back (open_rbracket);

32
src/plugins/tools/xor/lay_plugin/layXORToolDialog.cc
View File

@ -1331,33 +1331,33 @@ XORToolDialog::run_xor ()
} }
// create the XOR tasks // create the XOR tasks
for (db::Coord nw = 0; nw < db::Coord (ntiles_w); ++nw) { for (size_t nw = 0; nw < ntiles_w; ++nw) {
for (db::Coord nh = 0; nh < db::Coord (ntiles_h); ++nh) { for (size_t nh = 0; nh < ntiles_h; ++nh) {
db::Box clip_box (box_out.left () + nw * box_width_out, db::Box clip_box (box_out.left () + db::Coord (nw * box_width_out),
box_out.bottom () + nh * box_height_out, box_out.bottom () + db::Coord (nh * box_height_out),
(nw == ntiles_w - 1) ? box_out.right () : box_out.left () + (nw + 1) * box_width_out, (nw == ntiles_w - 1) ? box_out.right () : box_out.left () + db::Coord ((nw + 1) * box_width_out),
(nh == ntiles_h - 1) ? box_out.top () : box_out.bottom () + (nh + 1) * box_height_out); (nh == ntiles_h - 1) ? box_out.top () : box_out.bottom () + db::Coord ((nh + 1) * box_height_out));
db::Box region_a (box_a.left () + nw * box_width_a, db::Box region_a (box_a.left () + db::Coord (nw * box_width_a),
box_a.bottom () + nh * box_height_a, box_a.bottom () + db::Coord (nh * box_height_a),
(nw == ntiles_w - 1) ? box_a.right () : box_a.left () + (nw + 1) * box_width_a, (nw == ntiles_w - 1) ? box_a.right () : box_a.left () + db::Coord ((nw + 1) * box_width_a),
(nh == ntiles_h - 1) ? box_a.top () : box_a.bottom () + (nh + 1) * box_height_a); (nh == ntiles_h - 1) ? box_a.top () : box_a.bottom () + db::Coord ((nh + 1) * box_height_a));
db::Box region_b (box_b.left () + nw * box_width_b, db::Box region_b (box_b.left () + db::Coord (nw * box_width_b),
box_b.bottom () + nh * box_height_b, box_b.bottom () + db::Coord (nh * box_height_b),
(nw == ntiles_w - 1) ? box_b.right () : box_b.left () + (nw + 1) * box_width_b, (nw == ntiles_w - 1) ? box_b.right () : box_b.left () + db::Coord ((nw + 1) * box_width_b),
(nh == ntiles_h - 1) ? box_b.top () : box_b.bottom () + (nh + 1) * box_height_b); (nh == ntiles_h - 1) ? box_b.top () : box_b.bottom () + db::Coord ((nh + 1) * box_height_b));
region_a.enlarge (db::Vector (tile_enlargement_a, tile_enlargement_a)); region_a.enlarge (db::Vector (tile_enlargement_a, tile_enlargement_a));
region_b.enlarge (db::Vector (tile_enlargement_b, tile_enlargement_b)); region_b.enlarge (db::Vector (tile_enlargement_b, tile_enlargement_b));
std::string tile_desc = tl::sprintf ("%d/%d,%d/%d", nw + 1, ntiles_w, nh + 1, ntiles_h); std::string tile_desc = tl::sprintf ("%d/%d,%d/%d", int (nw + 1), ntiles_w, int (nh + 1), ntiles_h);
unsigned int layer_index = 0; unsigned int layer_index = 0;
for (std::map<db::LayerProperties, std::pair<std::vector<unsigned int>, std::vector<unsigned int> >, db::LPLogicalLessFunc>::const_iterator l = layers.begin (); l != layers.end (); ++l, ++layer_index) { for (std::map<db::LayerProperties, std::pair<std::vector<unsigned int>, std::vector<unsigned int> >, db::LPLogicalLessFunc>::const_iterator l = layers.begin (); l != layers.end (); ++l, ++layer_index) {
job.schedule (new XORTask (tile_desc, clip_box, region_a, region_b, layer_index, l->first, l->second.first, l->second.second, nw, nh)); job.schedule (new XORTask (tile_desc, clip_box, region_a, region_b, layer_index, l->first, l->second.first, l->second.second, int (nw), int (nh)));
} }
} }

22
src/tl/unit_tests/tlLongInt.cc
View File

@ -72,7 +72,7 @@ static void run_test_int (tl::TestBase *_this, I1 a, I2 b)
EXPECT_EQ (to_i (ae + be), a + b); EXPECT_EQ (to_i (ae + be), a + b);
r = ae; r = ae;
r += be; r += be;
EXPECT_EQ (to_i (r), a + b); EXPECT_EQ (I1 (to_i (r)), a + I1 (b));
EXPECT_EQ (to_i (ae + basic_type (2)), a + basic_type (2)); EXPECT_EQ (to_i (ae + basic_type (2)), a + basic_type (2));
r = ae; r = ae;
r += basic_type (2); r += basic_type (2);
@ -81,34 +81,34 @@ static void run_test_int (tl::TestBase *_this, I1 a, I2 b)
EXPECT_EQ (to_i (ae - be), a - b); EXPECT_EQ (to_i (ae - be), a - b);
r = ae; r = ae;
r -= be; r -= be;
EXPECT_EQ (to_i (r), a - b); EXPECT_EQ (I1 (to_i (r)), a - I1 (b));
EXPECT_EQ (to_i (ae - basic_type (2)), a - basic_type (2)); EXPECT_EQ (to_i (ae - basic_type (2)), a - basic_type (2));
r = ae; r = ae;
r -= basic_type (2); r -= basic_type (2);
EXPECT_EQ (to_i (r), a - basic_type (2)); EXPECT_EQ (to_i (r), a - basic_type (2));
EXPECT_EQ (ae == be, a == b); EXPECT_EQ (LI2 (ae) == be, I2 (a) == b);
EXPECT_EQ (ae != be, a != b); EXPECT_EQ (LI2 (ae) != be, I2 (a) != b);
EXPECT_EQ (ae < be, a < b); EXPECT_EQ (LI2 (ae) < be, I2 (a) < b);
EXPECT_EQ (ae <= be, a <= b); EXPECT_EQ (LI2 (ae) <= be, I2 (a) <= b);
EXPECT_EQ (ae > be, a > b); EXPECT_EQ (LI2 (ae) > be, I2 (a) > b);
EXPECT_EQ (ae >= be, a >= b); EXPECT_EQ (LI2 (ae) >= be, I2 (a) >= b);
EXPECT_EQ (ae.is_zero (), a == 0); EXPECT_EQ (ae.is_zero (), a == 0);
EXPECT_EQ (to_i (ae * be), a * b); EXPECT_EQ (to_i (ae * be), a * b);
r = ae; r = ae;
r *= be; r *= be;
EXPECT_EQ (to_i (r), a * b); EXPECT_EQ (I1 (to_i (r)), a * I1 (b));
if (b != 0) { if (b != 0) {
EXPECT_EQ (to_i (ae / be), a / b); EXPECT_EQ (to_i (ae / be), a / b);
r = ae; r = ae;
r /= be; r /= be;
EXPECT_EQ (to_i (r), a / b); EXPECT_EQ (I1 (to_i (r)), a / I1 (b));
EXPECT_EQ (to_i (ae % be), a % b); EXPECT_EQ (to_i (ae % be), a % b);
r = ae; r = ae;
r %= be; r %= be;
EXPECT_EQ (to_i (r), a % b); EXPECT_EQ (I1 (to_i (r)), a % I1 (b));
} }
} }