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iverilog/ivtest/ivltests/pr1077.v
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Stephen Williams cea237b407 Add ivtest to the iverilog source tree
By adding ivtest to the iverilog source tree, it is easier to keep
the regression test synchronized with the source that is being tested.
This should be especially helpful for PRs that add a new feature, and
have a matching ivtest PR with the regression test for that feature.
2022-01-15 10:18:50 -08:00

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Verilog

`begin_keywords "1364-2005"
/*
* This program is based on PR#1077.
*
* Expected output:
* one
* y = x
* one
* y = 1
* one
* y = 1
*/
module bool;
reg clk,y;
reg [31:0] count;
initial clk=0;
always #2.5 clk = ~clk;
initial begin
count = 'h8;
#20
$finish(0);
end
always @(posedge clk)
begin
// BUG: this should eval to "1" but does not!
y <= count[10] || ~count[5:3];
// this should print "one" and does
if(count[10] || ~(count[5:3]))
$display("one");
else
$display("zero");
$display("y = %b",y);
end
endmodule
`end_keywords