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https://github.com/steveicarus/iverilog.git
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Stephen Williams
8e704cbf93
Move the storage of wires (signals) out of the Module class into the PScope base class, and instead of putting the PWires all into the Module object, distribute them into the various lexical scopes (derived from PScope) so that the wire names do not need to carry scope information. This required some rewiring of elaboration of signals, and rewriting of lexical scope handling.
118 lines
3.6 KiB
C++
118 lines
3.6 KiB
C++
#ifndef __PGenerate_H
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#define __PGenerate_H
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/*
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* Copyright (c) 2006 Stephen Williams ([email protected])
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: PGenerate.h,v 1.4 2007/06/02 03:42:12 steve Exp $"
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#endif
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# include "LineInfo.h"
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# include "StringHeap.h"
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# include "HName.h"
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# include <list>
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# include <map>
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# include "pform_types.h"
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class Design;
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class NetScope;
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class PExpr;
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class PProcess;
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class PGate;
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class PWire;
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/*
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* This represents a generate scheme. The interpretation of the
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* members depends on the scheme_type.
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*
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* GS_LOOP
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*
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* GS_CASE
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* loop_test is the expression to be compared.
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* generates contains only GS_CASE_ITEM schemes.
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* GS_CASE_ITEM
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* The parent points to the GS_CASE that contains this item.
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* the loop_test is compared with the parent->loop_test expression.
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*/
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class PGenerate : public LineInfo {
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public:
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PGenerate(unsigned id_number);
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~PGenerate();
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// Generate schemes have an ID number, for when the scope is
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// implicit.
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const unsigned id_number;
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perm_string scope_name;
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enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT, GS_ELSE,
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GS_CASE, GS_CASE_ITEM};
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scheme_t scheme_type;
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// generate loops have an index variable and three
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// expressions: for (index = <init>; <test>; index=<step>)
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perm_string loop_index;
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PExpr*loop_init;
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PExpr*loop_test;
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PExpr*loop_step;
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map<perm_string,PWire*>wires;
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PWire* get_wire(perm_string name) const;
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list<PGate*> gates;
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void add_gate(PGate*);
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list<PProcess*> behaviors;
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void add_behavior(PProcess*behave);
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list<PGenerate*> generates;
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PGenerate*parent;
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// This method is called by the elaboration of a module to
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// generate scopes. the container is the scope that is to
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// contain the generated scope.
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bool generate_scope(Design*des, NetScope*container);
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// Elaborate signals within any of the generated scopes that
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// were made by this generate block within the given container scope.
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bool elaborate_sig(Design*des, NetScope*container) const;
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bool elaborate(Design*des, NetScope*container) const;
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void dump(ostream&out, unsigned indent) const;
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private:
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bool generate_scope_loop_(Design*des, NetScope*container);
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bool generate_scope_condit_(Design*des, NetScope*container, bool else_flag);
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bool generate_scope_case_(Design*des, NetScope*container);
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// Elaborate_scope within a generated scope.
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void elaborate_subscope_(Design*des, NetScope*scope);
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// These are the scopes created by generate_scope.
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list<NetScope*>scope_list_;
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// internal function called on each scope generated by this scheme.
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bool elaborate_sig_(Design*des, NetScope*scope) const;
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bool elaborate_(Design*des, NetScope*scope) const;
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private: // not implemented
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PGenerate(const PGenerate&);
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PGenerate& operator= (const PGenerate&);
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};
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#endif
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