iverilog/tgt-stub
Cary R 11109f519c Push the automatic property for tasks and functions to the code gen.
This patch pushes the automatic property for both tasks and
functions to the code generators. The vvp back end does not
currently support this so it will error out during code
generation. The VHDL back end should be able to use this
property and tgt-stub prints the property. Having this will
also make it easier when we do adding this to the runtime.
2008-08-20 09:23:14 -07:00
..
.cvsignore Configure for stub. 2006-04-10 03:07:07 +00:00
Makefile.in Merge branch 'master' into verilog-ams 2008-05-23 21:23:16 -07:00
configure.in Spelling fixes (larry doolittle) 2007-02-26 19:49:48 +00:00
expression.c Properly evaluate a unary ! with logic argument and real result. 2008-06-19 19:14:19 -07:00
memory.c Rearrange how memories are supported as vvp_vector4 arrays. 2005-03-03 04:33:10 +00:00
priv.h Bring switch information out to the ivl_target API. 2008-05-23 20:53:10 -07:00
statement.c Use standard for printing uint64_t 2008-05-22 18:42:56 -07:00
stub-s.conf Install stub target. 2006-05-01 18:48:24 +00:00
stub.c Push the automatic property for tasks and functions to the code gen. 2008-08-20 09:23:14 -07:00
stub.conf Install stub target. 2006-05-01 18:48:24 +00:00
switches.c Got sense of tranvp wrong in connections to module ports. 2008-06-03 17:23:01 -07:00