107 lines
3.1 KiB
C++
107 lines
3.1 KiB
C++
#ifndef __Module_H
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#define __Module_H
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/*
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* Copyright (c) 1998 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: Module.h,v 1.4 1999/06/15 03:44:53 steve Exp $"
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#endif
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# include <list>
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# include <map>
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# include "svector.h"
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# include <string>
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class PExpr;
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class PGate;
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class PWire;
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class PProcess;
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class Design;
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/*
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* A module is a named container and scope. A module holds a bunch of
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* semantic quantities such as wires and gates. The module is
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* therefore the handle for grasping the described circuit.
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*/
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class Module {
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public:
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explicit Module(const string&name, unsigned nports)
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: ports(nports), name_(name) { }
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svector<PWire*> ports;
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/* The module has parameters that are evaluated when the
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module is elaborated. During parsing, I put the parameters
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into this map. */
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map<string,PExpr*>parameters;
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const string&get_name() const { return name_; }
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void add_gate(PGate*gate);
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void add_wire(PWire*wire);
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void add_behavior(PProcess*behave);
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// Find a wire by name. This is used for connecting gates to
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// existing wires, etc.
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PWire* get_wire(const string&name);
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const list<PWire*>& get_wires() const { return wires_; }
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const list<PGate*>& get_gates() const { return gates_; }
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const list<PProcess*>& get_behaviors() const { return behaviors_; }
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bool elaborate(Design*, const string&path) const;
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private:
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const string name_;
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list<PWire*> wires_;
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list<PGate*> gates_;
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list<PProcess*> behaviors_;
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private: // Not implemented
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Module(const Module&);
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Module& operator= (const Module&);
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};
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/*
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* $Log: Module.h,v $
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* Revision 1.4 1999/06/15 03:44:53 steve
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* Get rid of the STL vector template.
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*
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* Revision 1.3 1999/02/21 17:01:57 steve
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* Add support for module parameters.
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*
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* Revision 1.2 1999/01/25 05:45:56 steve
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* Add the LineInfo class to carry the source file
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* location of things. PGate, Statement and PProcess.
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*
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* elaborate handles module parameter mismatches,
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* missing or incorrect lvalues for procedural
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* assignment, and errors are propogated to the
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* top of the elaboration call tree.
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*
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* Attach line numbers to processes, gates and
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* assignment statements.
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*
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* Revision 1.1 1998/11/03 23:28:52 steve
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* Introduce verilog to CVS.
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*
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*/
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#endif
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