iverilog/tgt-vvp
Cary R bbdf622ea5 Fix numerous problems with the divide and modulus operators.
This patch fixes a number of problems related to the divide and
modulus operators.

The net version (CA) of modulus did not support a signed version.

Division or modulus of a value wider than the machine word did
not correctly check for division by zero and return 'bx.

Fixed a problem in procedural modulus. The sign of the result is
only dependent on the L-value.

Division or modulus of a signed value that was the same width as
the machine word was creating an incorrect sign mask.

Division of a signed value that would fit into a single machine
word was not checking for division by zero.

Division or modulus of a wide value was always being done as
unsigned.

Added a negative operator for vvp_vector2_t. This made
implementing the signed wide division and modulus easier.
2008-11-07 19:58:00 -08:00
..
.cvsignore vvp.conf files are generated. 2005-03-18 02:57:23 +00:00
Makefile.in The -V flag gets version information from all parts. 2008-09-07 21:54:46 -07:00
README.txt tgt-vvp generates code that skips nets as inputs. 2001-08-10 00:40:45 +00:00
configure.in Use inttypes.h to get uint64_t print format string 2008-01-14 09:53:20 -08:00
draw_mux.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
draw_net_input.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
draw_switch.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
draw_ufunc.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
draw_vpi.c Check that numbers fit into the correct immediate width (32 bits). 2008-10-13 19:56:46 -07:00
eval_bool.c Use inttypes.h to get uint64_t print format string 2008-01-14 09:53:20 -08:00
eval_expr.c Check that numbers fit into the correct immediate width (32 bits). 2008-10-13 19:56:46 -07:00
eval_real.c Add support for real/realtime arrays. 2008-11-01 20:44:03 -07:00
modpath.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
vector.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
vvp-s.conf.in Remove redundant back-end selections. 2008-09-07 16:43:54 -07:00
vvp.c Content-free portability fixes. 2008-09-29 18:06:47 -07:00
vvp.conf.in Remove redundant back-end selections. 2008-09-07 16:43:54 -07:00
vvp_config.h.in Content-free portability fixes. 2008-09-29 18:06:47 -07:00
vvp_priv.h Allow that sum immediate values can be signed. 2008-06-13 13:32:06 -07:00
vvp_process.c Add support for real/realtime arrays. 2008-11-01 20:44:03 -07:00
vvp_scope.c Fix numerous problems with the divide and modulus operators. 2008-11-07 19:58:00 -08:00

README.txt

THE VVP TARGET

SYMBOL NAME CONVENTIONS

There are some naming conventions that the vp target uses for
generating symbol names.

* wires and regs

Nets and variables are named V_<full-name> where <full-name> is the
full hierarchical name of the signal.

* Logic devices

Logic devices (and, or, buf, bufz, etc.) are named L_<full_name>. In
this case the symbol is attached to a functor that is the output of
the logic device.


GENERAL FUNCTOR WEB STRUCTURE

The net of gates, signals and resolvers is formed from the input
design. The basic structure is wrapped around the nexus, which is
represented by the ivl_nexus_t.

Each nexus represents a resolved value. The input of the nexus is fed
by a single driver. If the nexus in the design has multiple drivers,
the drivers are first fed into a resolver (or a tree of resolvers) to
form a single output that is the nexus.

The nexus, then, feeds its output to the inputs of other gates, or to
the .net objects in the design.