34 lines
662 B
Verilog
34 lines
662 B
Verilog
// Check that assignment patterns are supported for queue method arguments.
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module test;
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bit failed;
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bit [1:0][3:0] q[$];
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`define check(val, exp) do begin \
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if (val !== exp) begin \
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$display("FAILED(%0d). '%s' expected %0h, got %0h", `__LINE__, \
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`"val`", exp, val); \
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failed = 1'b1; \
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end \
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end while (0)
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initial begin
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failed = 1'b0;
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q.push_back('{4'h1, 4'h2});
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q.push_front('{4'h3, 4'h4});
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q.insert(1, '{4'h5, 4'h6});
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`check(q.size(), 3);
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`check(q[0], 8'h34);
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`check(q[1], 8'h56);
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`check(q[2], 8'h12);
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if (!failed) begin
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$display("PASSED");
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end
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end
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endmodule
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