steve df660bab0c draw proper signal references for the gates.		2000-10-26 16:42:25 +00:00
..
.cvsignore	Add enough tgt-verilog code to support hello world.	2000-09-23 05:15:07 +00:00
Makefile.in	Makefile patches to support target loading under cygwin.	2000-10-15 21:02:08 +00:00
verilog.c	draw proper signal references for the gates.	2000-10-26 16:42:25 +00:00