Files
iverilog/tgt-vlog95
Martin Whitaker b242663cae Support negedge flip-flops in synthesis and in vvp.
Also extend the support for FF asynchronous set values to vvp and
fix the dff functor in vvp to correctly model asynchronous set/clr
behaviour.
2015-06-13 16:47:57 +01:00
..
2015-05-04 22:32:29 +01:00
2015-06-04 15:00:29 -07:00