iverilog/uvm/ivl_uvm_std_ovl/ovl_stack.v

42 lines
1.3 KiB
Verilog

// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
`include "std_ovl_defines.h"
`module ovl_stack (clock, reset, enable, push, push_data, pop, pop_data, full, empty, fire);
parameter severity_level = `OVL_SEVERITY_DEFAULT;
parameter depth = 2;
parameter width = 1;
parameter high_water_mark = 0;
parameter push_latency = 0;
parameter pop_latency = 0;
parameter property_type = `OVL_PROPERTY_DEFAULT;
parameter msg = `OVL_MSG_DEFAULT;
parameter coverage_level = `OVL_COVER_DEFAULT;
parameter clock_edge = `OVL_CLOCK_EDGE_DEFAULT;
parameter reset_polarity = `OVL_RESET_POLARITY_DEFAULT;
parameter gating_type = `OVL_GATING_TYPE_DEFAULT;
input clock, reset, enable;
input pop, push, full, empty;
input [width-1:0] pop_data, push_data;
output [`OVL_FIRE_WIDTH-1 : 0] fire;
// Parameters that should not be edited
parameter assert_name = "OVL_STACK";
`include "std_ovl_reset.h"
`include "std_ovl_clock.h"
`include "std_ovl_cover.h"
`include "std_ovl_task.h"
`include "std_ovl_init.h"
`ifdef OVL_SVA
`include "./sva05/ovl_stack_logic.sv"
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`endif
`endmodule // ovl_stack