iverilog/ivtest/gold/resetall-v10.gold

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./ivltests/resetall.v:12: warning: Some modules have no timescale. This may cause
./ivltests/resetall.v:12: : confusing timing results. Affected modules are:
./ivltests/resetall.v:12: : -- module top_default declared here: ./ivltests/resetall.v:1
./ivltests/resetall.v:26: warning: Some modules have no timescale. This may cause
./ivltests/resetall.v:26: : confusing timing results. Affected modules are:
./ivltests/resetall.v:26: : -- module top_resetall declared here: ./ivltests/resetall.v:20
Time scale of (top_default) is 1s / 1s
Time scale of (top_timescale) is 1ns / 1ns
Time scale of (top_resetall) is 1s / 1s
Time scale of (top_timescale2) is 1ms / 1ms
Time scale of (top_timescale3) is 1us / 1us