312 lines
9.2 KiB
C++
312 lines
9.2 KiB
C++
/*
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* Copyright (c) 2011-2013 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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# include "architec.h"
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# include "entity.h"
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# include "expression.h"
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# include "sequential.h"
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# include "subprogram.h"
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# include "vsignal.h"
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# include "std_types.h"
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# include <iostream>
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# include <typeinfo>
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# include <ivl_assert.h>
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int Scope::emit_signals(ostream&out, Entity*entity, Architecture*arc)
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{
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int errors = 0;
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for (map<perm_string,Signal*>::iterator cur = old_signals_.begin()
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; cur != old_signals_.end() ; ++cur) {
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errors += cur->second->emit(out, entity, arc);
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}
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for (map<perm_string,Signal*>::iterator cur = new_signals_.begin()
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; cur != new_signals_.end() ; ++cur) {
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errors += cur->second->emit(out, entity, arc);
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}
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return errors;
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}
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int Scope::emit_variables(ostream&out, Entity*entity, Architecture*arc)
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{
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int errors = 0;
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for (map<perm_string,Variable*>::iterator cur = old_variables_.begin()
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; cur != old_variables_.end() ; ++cur) {
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errors += cur->second->emit(out, entity, arc);
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}
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for (map<perm_string,Variable*>::iterator cur = new_variables_.begin()
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; cur != new_variables_.end() ; ++cur) {
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errors += cur->second->emit(out, entity, arc);
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}
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return errors;
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}
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int Architecture::emit(ostream&out, Entity*entity)
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{
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int errors = 0;
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// Find typedefs that are present in the architecture body and
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// emit them, so that following code can use the name instead
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// of the full definition.
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typedef_context_t typedef_ctx;
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for (map<perm_string,const VType*>::iterator cur = use_types_.begin()
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; cur != use_types_.end() ; ++cur) {
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if(is_global_type(cur->first))
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continue;
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if(const VTypeDef*def = dynamic_cast<const VTypeDef*>(cur->second))
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errors += def->emit_typedef(out, typedef_ctx);
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}
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for (map<perm_string,const VType*>::iterator cur = cur_types_.begin()
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; cur != cur_types_.end() ; ++cur) {
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if(const VTypeDef*def = dynamic_cast<const VTypeDef*>(cur->second))
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errors += def->emit_typedef(out, typedef_ctx);
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}
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for (map<perm_string,struct const_t*>::iterator cur = use_constants_.begin()
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; cur != use_constants_.end() ; ++cur) {
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out << "localparam " << cur->first << " = ";
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errors += cur->second->val->emit(out, entity, this);
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out << ";" << endl;
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}
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for (map<perm_string,struct const_t*>::iterator cur = cur_constants_.begin()
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; cur != cur_constants_.end() ; ++cur) {
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out << "localparam " << cur->first << " = ";
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errors += cur->second->val->emit(out, entity, this);
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out << ";" << endl;
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}
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errors += emit_signals(out, entity, this);
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errors += emit_variables(out, entity, this);
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for (map<perm_string,SubprogramHeader*>::const_iterator cur = cur_subprograms_.begin()
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; cur != cur_subprograms_.end() ; ++ cur) {
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// Do not emit unbounded functions, we will just need fixed instances later
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if(!cur->second->unbounded())
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errors += cur->second->emit_package(out);
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}
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for (list<Architecture::Statement*>::iterator cur = statements_.begin()
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; cur != statements_.end() ; ++cur) {
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errors += (*cur)->emit(out, entity, this);
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}
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return errors;
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}
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int Architecture::Statement::emit(ostream&out, Entity*, Architecture*)
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{
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out << " // " << get_fileline() << ": internal error: "
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<< "I don't know how to emit this statement! "
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<< "type=" << typeid(*this).name() << endl;
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return 1;
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}
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int SignalAssignment::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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int errors = 0;
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ivl_assert(*this, rval_.size() == 1);
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Expression*rval = rval_.front();
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out << "// " << get_fileline() << endl;
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out << "assign ";
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errors += lval_->emit(out, ent, arc);
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out << " = ";
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errors += rval->emit(out, ent, arc);
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out << ";" << endl;
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return errors;
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}
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int ComponentInstantiation::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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const char*comma = "";
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int errors = 0;
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arc->set_cur_component(this);
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if(ComponentBase*comp = arc->find_component(cname_)) {
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const std::vector<InterfacePort*>& generics = comp->get_generics();
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if(generics.size() != generic_map_.size())
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// Display an error for generics that do not have neither
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// default nor component specific value defined
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for(vector<InterfacePort*>::const_iterator it = generics.begin();
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it != generics.end(); ++it) {
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if(!(*it)->expr && generic_map_.count((*it)->name) == 0) {
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cerr << get_fileline() << ": generic " << (*it)->name <<
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"value is not defined" << endl;
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++errors;
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}
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}
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}
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out << cname_;
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if (! generic_map_.empty()) {
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out << " #(";
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comma = "";
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for (map<perm_string,Expression*>::iterator cur = generic_map_.begin()
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; cur != generic_map_.end() ; ++cur) {
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ivl_assert(*this, cur->second);
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out << comma << ".\\" << cur->first << " (";
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errors += cur->second->emit(out, ent, arc);
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out << ")";
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comma = ", ";
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}
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out << ")";
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}
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out << " \\" << iname_ << " (";
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comma = "";
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for (map<perm_string,Expression*>::iterator cur = port_map_.begin()
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; cur != port_map_.end() ; ++cur) {
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// Skip unconnected ports
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if (cur->second == 0)
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continue;
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out << comma << ".\\" << cur->first << " (";
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errors += cur->second->emit(out, ent, arc);
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out << ")";
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comma = ", ";
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}
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out << ");" << endl;
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arc->set_cur_component(NULL);
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return errors;
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}
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int GenerateStatement::emit_statements(ostream&out, Entity*ent, Architecture*arc)
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{
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int errors = 0;
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for (list<Architecture::Statement*>::iterator cur = statements_.begin()
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; cur != statements_.end() ; ++cur) {
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Architecture::Statement*curp = *cur;
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errors += curp->emit(out, ent, arc);
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}
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return errors;
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}
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int ForGenerate::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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int errors = 0;
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out << "genvar \\" << get_name() << ":" << genvar_ << " ;" << endl;
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out << "for (\\" << get_name() << ":" << genvar_ << " = ";
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errors += lsb_->emit(out, ent, arc);
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out << "; \\" << get_name() << ":" << genvar_ << " <= ";
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errors += msb_->emit(out, ent, arc);
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out << "; \\" << get_name() << ":" << genvar_ << " = \\" << get_name() << ":" << genvar_ << " + 1)"
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<< " begin : \\" << get_name() << endl;
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arc->push_genvar_emit(genvar_, this);
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errors += emit_statements(out, ent, arc);
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arc->pop_genvar_emit();
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out << "end" << endl;
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return errors;
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}
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int IfGenerate::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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int errors = 0;
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out << "if (";
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cond_->emit(out, ent, arc);
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out << ") begin : \\" << get_name() << endl;
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errors += emit_statements(out, ent, arc);
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out << "end" << endl;
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return errors;
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}
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int StatementList::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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int errors = 0;
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for (std::list<SequentialStmt*>::iterator it = statements_.begin();
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it != statements_.end(); ++it) {
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errors += (*it)->emit(out, ent, arc);
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}
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return errors;
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}
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int InitialStatement::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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out << "initial begin" << endl;
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int errors = StatementList::emit(out, ent, arc);
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out << "end" << endl;
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return errors;
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}
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int FinalStatement::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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out << "final begin" << endl;
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int errors = StatementList::emit(out, ent, arc);
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out << "end" << endl;
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return errors;
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}
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/*
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* Emit a process statement using "always" syntax.
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*
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* Note that VHDL is different from Verilog, in that the sensitivity
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* list goes at the END of the statement list, not at the
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* beginning. In VHDL, all the statements are initially executed once
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* before blocking in the first wait on the sensitivity list.
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*/
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int ProcessStatement::emit(ostream&out, Entity*ent, Architecture*arc)
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{
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out << "always begin" << endl;
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int errors = StatementList::emit(out, ent, arc);
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if (! sensitivity_list_.empty()) {
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out << "@(";
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const char*comma = 0;
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for (list<Expression*>::iterator cur = sensitivity_list_.begin()
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; cur != sensitivity_list_.end() ; ++cur) {
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if (comma) out << comma;
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errors += (*cur)->emit(out, ent, arc);
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comma = ", ";
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}
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out << ") /* sensitivity list for process */;" << endl;
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}
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out << "end" << endl;
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return errors;
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}
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