144 lines
5.3 KiB
Plaintext
144 lines
5.3 KiB
Plaintext
/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* $Id: opcodes.txt,v 1.6 2001/03/26 04:00:39 steve Exp $
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*/
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EXECUTABLE INSTRUCTION OPCODES
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Instruction opcodes all start with a % character and have 0 or more
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operands. In no case are there more then 3 operands.
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* %assign <var-label>, <delay>, <bit>
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This does a non-blocking assignment to a variable. The <label>
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identifies the affected variable, and the <delay> gives the delay when
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the assignment takes place. The delay may be 0. For blocking
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assignments, see %set. The <bit> is the address of the thread register
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that contains the bit value to assign.
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* %cmp/u <bit-l>, <bit-r>, <wid>
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* %cmp/s <bit-l>, <bit-r>, <wid>
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These instructions perform a generic comparison of two vectors of equal
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size. The <bit-l> and <bit-r> numbers address the least-significant
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bit of each vector, and <wid> is the width. If either operator is 0,
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1, 2 or 3 then it is taken to be a constant replicated to the selected
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width.
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The results of the comparison go into bits 4, 5, 6 and 7:
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4: eq (equal)
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5: lt (less than)
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6: eeq (case equal)
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The eeq bit is set to 1 if all the bits in the vectors are exactly the
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same, or 0 otherwise. The eq bit is true if the values are logically
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the same. That is, x and z are considered equal. In other words the eq
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bit is the same as ``=='' and the eeq bit ``===''.
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The lt bit is 1 if the left vector is less then the right vector, or 0
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if greater then or equal to the right vector. It is the equivilent of
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the Verilog < operator. Combinations of these three bits can be used
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to implement all the Verilog comparison operators.
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The %cmp/u and %cmp/s differ only in the handling of the lt bit. The
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%cmp/u does an unsigned compare, whereas the %cmp/s does a signed
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compare.
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* %cmp/z <bit-l>, <bit-r>, <wid>
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* %cmp/x <bit-l>, <bit-r>, <wid>
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These instructions are for implementing the casez and casex
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comparisons. These work similar to the %cmp/u instructions, except
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only an eq bit is calculated. These comparisons both treat z values in
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the left or right operand as don't care positions. The %cmp/x
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instruction will also treat x values in either operand as don't care.
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Only bit 4 is set by these instructions.
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* %delay <delay>
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This opcode pauses the thread, and causes it to be rescheduled for a
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time in the future. The <amount> is the number of the ticks in the
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future to reschedule, and is >= 0. If the %delay is zero, then the
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thread yields the processor for another thread, but will be resumed in
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the current time step.
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* %inv <bit>, <wid>
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Perform a bitwise invert of the vector starting at <bit>.
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* %jmp <code-label>
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The %jmp instruction performs an unconditional branch to a given
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location. The parameter is the label of the destination instruction.
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* %jmp/[01xz] <code-label>, <bit>
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This is a conditional version of the %jmp instruction. In this case,
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a single bit (addressed by <bit>) is tested. If it is one of the
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values in the part after the /, the jump is taken. For example:
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%jmp/xz T_label, 8;
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will jump to T_label if bit 8 is x or z.
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* %load <bit>, <functor-label>
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This instruction loads a value from the given functor output into the
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specified thread register bit.
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* %mov <dst>, <src>, <wid>
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This instruction copies a vector from one place in register space to
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another. The destination and source vectors are assumed to be the same
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width and non-overlapping. The <dst> may not be 0-3, but if the <src>
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is one of the 4 constant bits, the effect is to replicate the value
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into the destination vector. Useful for filling a vector.
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* %set <var-label>, <bit>
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This sets a bit of a variable, and is used to implement blocking
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assignments. The <label> identifies the variable to receive the new
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value. Once the set completes, the value is immediately available to
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be read out of the variable. The <bit> is the address of the thread
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register that contains the bit value to assign.
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* %vpi_call <name> [, ...]
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This instruction makes a call to a system task or function that was
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declared using VPI. The operands are compiled down to a vpiHandle for
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the call. The instruction contains only the vpiHandle for the
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call. See the vpi.txt file for more on system task/function calls.
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* %wait <functor-label>
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When a thread executes this instruction, it places itself in the
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sensitive list for the addressed functor. The functor holds all the
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threads that await the functor. When the defined sort of event occurs
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on the functor, a thread schedule event is created for all the threads
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in its list and the list is cleared.
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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