689 lines
18 KiB
C
689 lines
18 KiB
C
/*
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* Copyright (c) 2003 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-lpm.c,v 1.4 2003/08/09 03:23:03 steve Exp $"
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#endif
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/*
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* This is the driver for a purely generic LPM module writer. This
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* uses LPM version 2 1 0 devices, without particularly considering
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* the target technology.
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*
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* The LPM standard is EIA-IS/103-A October 1996
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* The output is EDIF 2 0 0 format.
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*/
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# include "device.h"
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# include "fpga_priv.h"
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# include "edif.h"
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# include "generic.h"
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# include <string.h>
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# include <assert.h>
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static edif_cell_t lpm_cell_buf(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "BUF", 2);
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edif_cell_portconfig(tmp, 0, "Result", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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/* A buffer is an inverted inverter. */
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edif_cell_port_pstring(tmp, 0, "LPM_Polarity", "INVERT");
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_INV");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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edif_cell_pinteger(tmp, "LPM_Size", 1);
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return tmp;
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}
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static edif_cell_t lpm_cell_inv(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "INV", 2);
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edif_cell_portconfig(tmp, 0, "Result", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_INV");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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edif_cell_pinteger(tmp, "LPM_Size", 1);
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return tmp;
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}
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static edif_cell_t lpm_cell_bufif0(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "BUFIF1", 3);
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edif_cell_portconfig(tmp, 0, "TriData", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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edif_cell_portconfig(tmp, 2, "EnableDT", IVL_SIP_INPUT);
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edif_cell_port_pstring(tmp, 2, "LPM_Polarity", "INVERT");
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_BUSTRI");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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return tmp;
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}
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static edif_cell_t lpm_cell_bufif1(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "BUFIF1", 3);
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edif_cell_portconfig(tmp, 0, "TriData", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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edif_cell_portconfig(tmp, 2, "EnableDT", IVL_SIP_INPUT);
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_BUSTRI");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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return tmp;
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}
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static edif_cell_t lpm_cell_or(unsigned siz)
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{
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unsigned idx;
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edif_cell_t cell;
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char name[32];
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sprintf(name, "or%u", siz);
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cell = edif_xlibrary_findcell(xlib, name);
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if (cell != 0)
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return cell;
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cell = edif_xcell_create(xlib, strdup(name), siz+1);
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edif_cell_portconfig(cell, 0, "Result0", IVL_SIP_OUTPUT);
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for (idx = 0 ; idx < siz ; idx += 1) {
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sprintf(name, "Data%ux0", idx);
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edif_cell_portconfig(cell, idx+1, strdup(name), IVL_SIP_INPUT);
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}
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edif_cell_pstring(cell, "LPM_TYPE", "LPM_OR");
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edif_cell_pinteger(cell, "LPM_Width", 1);
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edif_cell_pinteger(cell, "LPM_Size", siz);
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return cell;
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}
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static edif_cell_t lpm_cell_nor(unsigned siz)
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{
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unsigned idx;
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edif_cell_t cell;
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char name[32];
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sprintf(name, "nor%u", siz);
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cell = edif_xlibrary_findcell(xlib, name);
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if (cell != 0)
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return cell;
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cell = edif_xcell_create(xlib, strdup(name), siz+1);
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edif_cell_portconfig(cell, 0, "Result0", IVL_SIP_OUTPUT);
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edif_cell_port_pstring(cell, 0, "LPM_Polarity", "INVERT");
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for (idx = 0 ; idx < siz ; idx += 1) {
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sprintf(name, "Data%ux0", idx);
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edif_cell_portconfig(cell, idx+1, strdup(name), IVL_SIP_INPUT);
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}
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edif_cell_pstring(cell, "LPM_TYPE", "LPM_OR");
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edif_cell_pinteger(cell, "LPM_Width", 1);
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edif_cell_pinteger(cell, "LPM_Size", siz);
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return cell;
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}
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static void lpm_show_header(ivl_design_t des)
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{
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unsigned idx;
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ivl_scope_t root = ivl_design_root(des);
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unsigned sig_cnt = ivl_scope_sigs(root);
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unsigned nports = 0, pidx;
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/* Count the ports I'm going to use. */
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for (idx = 0 ; idx < sig_cnt ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(root, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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if (ivl_signal_attr(sig, "PAD") != 0)
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continue;
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nports += ivl_signal_pins(sig);
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}
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/* Create the base edf object. */
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edf = edif_create(ivl_scope_basename(root), nports);
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pidx = 0;
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for (idx = 0 ; idx < sig_cnt ; idx += 1) {
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edif_joint_t jnt;
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ivl_signal_t sig = ivl_scope_sig(root, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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if (ivl_signal_attr(sig, "PAD") != 0)
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continue;
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if (ivl_signal_pins(sig) == 1) {
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edif_portconfig(edf, pidx, ivl_signal_basename(sig),
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ivl_signal_port(sig));
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assert(ivl_signal_pins(sig) == 1);
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jnt = edif_joint_of_nexus(edf, ivl_signal_pin(sig, 0));
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edif_port_to_joint(jnt, edf, pidx);
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} else {
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const char*name = ivl_signal_basename(sig);
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ivl_signal_port_t dir = ivl_signal_port(sig);
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char buf[128];
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unsigned bit;
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for (bit = 0 ; bit < ivl_signal_pins(sig) ; bit += 1) {
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const char*tmp;
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sprintf(buf, "%s[%u]", name, bit);
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tmp = strdup(buf);
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edif_portconfig(edf, pidx+bit, tmp, dir);
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jnt = edif_joint_of_nexus(edf,ivl_signal_pin(sig,bit));
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edif_port_to_joint(jnt, edf, pidx+bit);
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}
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}
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pidx += ivl_signal_pins(sig);
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}
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assert(pidx == nports);
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xlib = edif_xlibrary_create(edf, "LPM_LIBRARY");
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}
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static void lpm_show_footer(ivl_design_t des)
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{
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edif_print(xnf, edf);
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}
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static void hookup_logic_gate(ivl_net_logic_t net, edif_cell_t cell)
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{
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unsigned pin, idx;
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edif_joint_t jnt;
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edif_cellref_t ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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pin = edif_cell_port_byname(cell, "Result0");
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edif_add_to_joint(jnt, ref, pin);
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for (idx = 1 ; idx < ivl_logic_pins(net) ; idx += 1) {
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char name[32];
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, idx));
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sprintf(name, "Data%ux0", idx-1);
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pin = edif_cell_port_byname(cell, name);
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edif_add_to_joint(jnt, ref, pin);
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}
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}
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static void lpm_logic(ivl_net_logic_t net)
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{
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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switch (ivl_logic_type(net)) {
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case IVL_LO_BUFZ:
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case IVL_LO_BUF:
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assert(ivl_logic_pins(net) == 2);
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cell = lpm_cell_buf();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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break;
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case IVL_LO_BUFIF0:
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assert(ivl_logic_pins(net) == 3);
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cell = lpm_cell_bufif0();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 2));
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edif_add_to_joint(jnt, ref, 2);
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break;
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case IVL_LO_BUFIF1:
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assert(ivl_logic_pins(net) == 3);
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cell = lpm_cell_bufif1();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 2));
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edif_add_to_joint(jnt, ref, 2);
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break;
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case IVL_LO_NOT:
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assert(ivl_logic_pins(net) == 2);
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cell = lpm_cell_inv();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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break;
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case IVL_LO_OR:
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cell = lpm_cell_or(ivl_logic_pins(net)-1);
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hookup_logic_gate(net, cell);
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break;
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case IVL_LO_NOR:
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cell = lpm_cell_nor(ivl_logic_pins(net)-1);
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hookup_logic_gate(net, cell);
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break;
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default:
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fprintf(stderr, "UNSUPPORTED LOGIC TYPE: %u\n",
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ivl_logic_type(net));
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break;
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}
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}
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static void lpm_show_dff(ivl_lpm_t net)
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{
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char name[64];
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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unsigned idx;
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unsigned pin, wid = ivl_lpm_width(net);
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sprintf(name, "fd%s%u", ivl_lpm_enable(net)? "ce" : "", wid);
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cell = edif_xlibrary_findcell(xlib, name);
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if (cell == 0) {
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unsigned nports = 2 * wid + 1;
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pin = 0;
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if (ivl_lpm_enable(net))
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nports += 1;
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cell = edif_xcell_create(xlib, strdup(name), nports);
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edif_cell_pstring(cell, "LPM_Type", "LPM_FF");
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edif_cell_pinteger(cell, "LPM_Width", wid);
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for (idx = 0 ; idx < wid ; idx += 1) {
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sprintf(name, "Q%u", idx);
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edif_cell_portconfig(cell, idx*2+0, strdup(name),
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IVL_SIP_OUTPUT);
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sprintf(name, "Data%u", idx);
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edif_cell_portconfig(cell, idx*2+1, strdup(name),
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IVL_SIP_INPUT);
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}
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pin = wid*2;
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if (ivl_lpm_enable(net)) {
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edif_cell_portconfig(cell, pin, "Enable", IVL_SIP_INPUT);
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pin += 1;
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}
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edif_cell_portconfig(cell, pin, "Clock", IVL_SIP_INPUT);
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pin += 1;
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assert(pin == nports);
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}
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ref = edif_cellref_create(edf, cell);
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pin = edif_cell_port_byname(cell, "Clock");
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jnt = edif_joint_of_nexus(edf, ivl_lpm_clk(net));
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edif_add_to_joint(jnt, ref, pin);
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if (ivl_lpm_enable(net)) {
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pin = edif_cell_port_byname(cell, "Enable");
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jnt = edif_joint_of_nexus(edf, ivl_lpm_enable(net));
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edif_add_to_joint(jnt, ref, pin);
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}
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for (idx = 0 ; idx < wid ; idx += 1) {
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sprintf(name, "Q%u", idx);
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pin = edif_cell_port_byname(cell, name);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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sprintf(name, "Data%u", idx);
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pin = edif_cell_port_byname(cell, name);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_data(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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}
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}
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static void lpm_show_mux(ivl_lpm_t net)
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{
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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unsigned idx, rdx;
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char cellname[32];
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unsigned wid_r = ivl_lpm_width(net);
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unsigned wid_s = ivl_lpm_selects(net);
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unsigned wid_z = ivl_lpm_size(net);
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sprintf(cellname, "mux%u_%u_%u", wid_r, wid_s, wid_z);
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cell = edif_xlibrary_findcell(xlib, cellname);
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if (cell == 0) {
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unsigned pins = wid_r + wid_s + wid_r*wid_z;
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cell = edif_xcell_create(xlib, strdup(cellname), pins);
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/* Make the output ports. */
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for (idx = 0 ; idx < wid_r ; idx += 1) {
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sprintf(cellname, "Result%u", idx);
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edif_cell_portconfig(cell, idx, strdup(cellname),
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IVL_SIP_OUTPUT);
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}
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/* Make the select ports. */
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for (idx = 0 ; idx < wid_s ; idx += 1) {
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sprintf(cellname, "Sel%u", idx);
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edif_cell_portconfig(cell, wid_r+idx, strdup(cellname),
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IVL_SIP_INPUT);
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}
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for (idx = 0 ; idx < wid_z ; idx += 1) {
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unsigned base = wid_r + wid_s + wid_r * idx;
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unsigned rdx;
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for (rdx = 0 ; rdx < wid_r ; rdx += 1) {
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sprintf(cellname, "Data%ux%u", idx, rdx);
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edif_cell_portconfig(cell, base+rdx, strdup(cellname),
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IVL_SIP_INPUT);
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}
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}
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edif_cell_pstring(cell, "LPM_Type", "LPM_MUX");
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edif_cell_pinteger(cell, "LPM_Width", wid_r);
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edif_cell_pinteger(cell, "LPM_WidthS", wid_s);
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edif_cell_pinteger(cell, "LPM_Size", wid_z);
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}
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ref = edif_cellref_create(edf, cell);
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/* Connect the pins of the instance to the nexa. Access the
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cell pins by name. */
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for (idx = 0 ; idx < wid_r ; idx += 1) {
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unsigned pin;
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sprintf(cellname, "Result%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
|
|
for (idx = 0 ; idx < wid_s ; idx += 1) {
|
|
unsigned pin;
|
|
|
|
sprintf(cellname, "Sel%u", idx);
|
|
pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_select(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
|
|
for (idx = 0 ; idx < wid_z ; idx += 1) {
|
|
for (rdx = 0 ; rdx < wid_r ; rdx += 1) {
|
|
unsigned pin;
|
|
|
|
sprintf(cellname, "Data%ux%u", idx, rdx);
|
|
pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, idx, rdx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void lpm_show_add(ivl_lpm_t net)
|
|
{
|
|
unsigned idx;
|
|
char cellname[32];
|
|
edif_cell_t cell;
|
|
edif_cellref_t ref;
|
|
edif_joint_t jnt;
|
|
|
|
const char*type = "ADD";
|
|
|
|
if (ivl_lpm_type(net) == IVL_LPM_SUB)
|
|
type = "SUB";
|
|
|
|
/* Find the correct ADD/SUB device in the library, search by
|
|
name. If the device is not there, then create it and put it
|
|
in the library. */
|
|
sprintf(cellname, "%s%u", type, ivl_lpm_width(net));
|
|
cell = edif_xlibrary_findcell(xlib, cellname);
|
|
|
|
if (cell == 0) {
|
|
unsigned pins = ivl_lpm_width(net) * 3 + 1;
|
|
|
|
cell = edif_xcell_create(xlib, strdup(cellname), pins);
|
|
|
|
for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
|
|
|
|
sprintf(cellname, "Result%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+0, strdup(cellname),
|
|
IVL_SIP_OUTPUT);
|
|
|
|
sprintf(cellname, "DataA%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+1, strdup(cellname),
|
|
IVL_SIP_INPUT);
|
|
|
|
sprintf(cellname, "DataB%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+2, strdup(cellname),
|
|
IVL_SIP_INPUT);
|
|
}
|
|
|
|
edif_cell_portconfig(cell, pins-1, "Cout", IVL_SIP_OUTPUT);
|
|
|
|
edif_cell_pstring(cell, "LPM_Type", "LPM_ADD_SUB");
|
|
edif_cell_pstring(cell, "LPM_Direction", type);
|
|
edif_cell_pinteger(cell, "LPM_Width", ivl_lpm_width(net));
|
|
}
|
|
|
|
ref = edif_cellref_create(edf, cell);
|
|
|
|
/* Connect the pins of the instance to the nexa. Access the
|
|
cell pins by name. */
|
|
for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
|
|
unsigned pin;
|
|
|
|
sprintf(cellname, "Result%u", idx);
|
|
pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
|
|
sprintf(cellname, "DataA%u", idx);
|
|
pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_data(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
|
|
sprintf(cellname, "DataB%u", idx);
|
|
pin = edif_cell_port_byname(cell, cellname);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_datab(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
}
|
|
|
|
static void lpm_show_mult(ivl_lpm_t net)
|
|
{
|
|
char name[64];
|
|
unsigned idx;
|
|
|
|
edif_cell_t cell;
|
|
edif_cellref_t ref;
|
|
edif_joint_t jnt;
|
|
|
|
sprintf(name, "mult%u", ivl_lpm_width(net));
|
|
cell = edif_xlibrary_findcell(xlib, name);
|
|
|
|
if (cell == 0) {
|
|
cell = edif_xcell_create(xlib, strdup(name),
|
|
3 * ivl_lpm_width(net));
|
|
|
|
for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
|
|
|
|
sprintf(name, "Result%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+0,
|
|
strdup(name),
|
|
IVL_SIP_OUTPUT);
|
|
|
|
sprintf(name, "DataA%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+1,
|
|
strdup(name),
|
|
IVL_SIP_INPUT);
|
|
|
|
sprintf(name, "DataB%u", idx);
|
|
edif_cell_portconfig(cell, idx*3+2,
|
|
strdup(name),
|
|
IVL_SIP_INPUT);
|
|
}
|
|
|
|
edif_cell_pstring(cell, "LPM_Type", "LPM_MULT");
|
|
edif_cell_pinteger(cell, "LPM_WidthP", ivl_lpm_width(net));
|
|
edif_cell_pinteger(cell, "LPM_WidthA", ivl_lpm_width(net));
|
|
edif_cell_pinteger(cell, "LPM_WidthB", ivl_lpm_width(net));
|
|
}
|
|
|
|
ref = edif_cellref_create(edf, cell);
|
|
|
|
for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
|
|
unsigned pin;
|
|
ivl_nexus_t nex;
|
|
|
|
sprintf(name, "Result%u", idx);
|
|
pin = edif_cell_port_byname(cell, name);
|
|
|
|
jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
|
|
if ( (nex = ivl_lpm_data(net, idx)) ) {
|
|
sprintf(name, "DataA%u", idx);
|
|
pin = edif_cell_port_byname(cell, name);
|
|
|
|
jnt = edif_joint_of_nexus(edf, nex);
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
|
|
if ( (nex = ivl_lpm_datab(net, idx)) ) {
|
|
sprintf(name, "DataB%u", idx);
|
|
pin = edif_cell_port_byname(cell, name);
|
|
|
|
jnt = edif_joint_of_nexus(edf, nex);
|
|
edif_add_to_joint(jnt, ref, pin);
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
const struct device_s d_lpm_edif = {
|
|
lpm_show_header,
|
|
lpm_show_footer,
|
|
0,
|
|
0,
|
|
lpm_logic,
|
|
lpm_show_dff, /* show_dff */
|
|
0,
|
|
0,
|
|
0,
|
|
lpm_show_mux, /* show_mux */
|
|
lpm_show_add, /* show_add */
|
|
lpm_show_add, /* show_sub */
|
|
0, /* show_shiftl */
|
|
0, /* show_shiftr */
|
|
lpm_show_mult /* show_mult */
|
|
};
|
|
|
|
/*
|
|
* $Log: d-lpm.c,v $
|
|
* Revision 1.4 2003/08/09 03:23:03 steve
|
|
* Add support for IVL_LPM_MULT device.
|
|
*
|
|
* Revision 1.3 2003/08/09 02:40:50 steve
|
|
* Generate LPM_FF devices.
|
|
*
|
|
* Revision 1.2 2003/08/07 05:18:04 steve
|
|
* Add support for OR/NOR/bufif0/bufif1.
|
|
*
|
|
* Revision 1.1 2003/08/07 04:04:01 steve
|
|
* Add an LPM device type.
|
|
*
|
|
*/
|
|
|