13 lines
314 B
Verilog
13 lines
314 B
Verilog
module top;
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wire clock, clock_2x, reset, phase;
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phaser ph(.clock_1x(clock), .clock_2x(clock_2x), reset, phase);
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phaser ph2(.clock_1x(clock), .clock_2x(clock_2x), reset, .phase(phase));
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endmodule
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module phaser(clock_1x, clock_2x, reset, phase);
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input clock_1x, clock_2x, reset;
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output phase;
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endmodule
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