19 lines
782 B
Verilog
19 lines
782 B
Verilog
// I ran this with "iverilog -y. bugreport.v -s bugreport && ./a.out"
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// on Icarus Verilog version 0.9.devel (s20080429)
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// and got "Bug observed: Got xxxxx, expected 0004b."
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// (some code taken from async_transmitter.v at http://www.fpga4fun.com)
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module bugreport;
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parameter ClkFrequency = 50000000;
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parameter Baud = 57600;
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parameter BaudGeneratorAccWidth = 16;
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wire [BaudGeneratorAccWidth:0] BaudGeneratorInc = ((Baud<<(BaudGeneratorAccWidth-4))+(ClkFrequency>>5))/(ClkFrequency>>4);
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wire [BaudGeneratorAccWidth:0] BaudGeneratorIncShouldBe = 17'h4b;
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initial #1 if (BaudGeneratorInc !== BaudGeneratorIncShouldBe)
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$display("FAILED -- Got %x, expected %x.",BaudGeneratorInc,BaudGeneratorIncShouldBe);
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else
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$display("PASSED");
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endmodule // bugreport
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