20 lines
309 B
Verilog
20 lines
309 B
Verilog
// This is just a syntax test.
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/* comment */ `default_nettype /* comment */ // comment
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/* comment */ wire /* comment */ // comment
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module m1;
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endmodule
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/* comment */`default_nettype/*
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comment */
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/* comment */tri0/*
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comment */
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module m2;
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endmodule
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module test;
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initial $display("PASSED");
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endmodule
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