26 lines
386 B
Verilog
26 lines
386 B
Verilog
package foobar;
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class aclass;
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bit tested = 0;
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task test;
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begin
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$display("Testing classes in packages");
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tested = 1;
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end
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endtask
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endclass
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aclass bar = new;
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endpackage
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module test;
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import foobar::*;
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initial begin
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bar.test;
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if (bar.tested)
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$display("PASSED");
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else
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$display("FAILED");
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end
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endmodule
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