iverilog/tgt-pcb
Henner Zeller 5b699c1be7 Bison includes its generated header in *.cc. Generate with correct name.
The current bison (3.7) generates a *.cc file that includes the header
it generated. For parse.cc this would be parse.hh. Right now, we rename
this header to have a common name used in other files, but this results
in a compile error for the parse.cc file:

parse.cc:462:10: fatal error: parse.hh: No such file or directory
  462 | #include "parse.hh"
      |          ^~~~~~~~~~

Fix this by telling bison to output the header file to the correct
filename in the first place so that we don't have to rename it.
(using the --defines instead of -d option).

This looks like a bison specific option not available in Posix yacc;
but looks like we're requiring bison anyway.

Signed-off-by: Henner Zeller <h.zeller@acm.org>
2020-07-29 15:29:08 -07:00
..
Makefile.in Bison includes its generated header in *.cc. Generate with correct name. 2020-07-29 15:29:08 -07:00
cppcheck.sup Remove some cppcheck warnings 2014-06-28 16:56:09 -07:00
footprint.cc Spelling fixes 2014-01-30 15:34:20 -08:00
fp.lex Update flex destroy routines to work for version 2.6 and greater 2017-11-16 19:11:50 -08:00
fp.y replace deprecated yacc directives 2019-09-29 18:19:45 -05:00
fp_api.h Update header files to use a more standard name to prevent rereading 2014-07-23 13:42:56 -07:00
pcb-s.conf Add a pcb-s.conf file compatible with the -S flag. 2011-12-24 10:39:41 -05:00
pcb.cc Update the user visible copyright to be 2020 2020-05-31 13:41:38 -07:00
pcb.conf Introduce PCB code generator. 2011-12-20 14:16:54 -06:00
pcb_config.h.in Update header files to use a more standard name to prevent rereading 2014-07-23 13:42:56 -07:00
pcb_priv.h Update header files to use a more standard name to prevent rereading 2014-07-23 13:42:56 -07:00
scope.cc Add CXX warning flag to tgt-pcb and tgt-vhdl and fix warnings 2013-07-11 17:40:57 -07:00
show_netlist.cc updated FSF-address 2012-08-29 10:12:10 -07:00
show_pcb.cc Merge branch 'master' of github.com:steveicarus/iverilog 2012-12-23 12:18:05 -08:00