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https://github.com/steveicarus/iverilog.git
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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
22 lines
442 B
Verilog
22 lines
442 B
Verilog
// This program is about testing that the value ranges parse and work for
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// integer parameters.
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module test(input wire bar);
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parameter real foo = 0.0 from [-10.0 : 10.0] exclude [1:2);
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parameter real bar = 0 from (-inf:0];
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initial begin
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$display("foo = %f", foo);
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$display("PASSED");
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$finish;
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end
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endmodule // test
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module main;
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reg rrr = 0;
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test #(.foo(1), .bar(-5.0)) dut (rrr);
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endmodule // main
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