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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
14 lines
235 B
Verilog
14 lines
235 B
Verilog
task a_task (input int id);
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$display("This is task %0d.", id);
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endtask
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// This should print the following:
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// This is task 2.
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// This is task 1.
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module top;
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initial begin
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a_task(2);
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a_task(1);
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end
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endmodule
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