mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-03 01:13:47 +02:00
Check that out-of-bounds access on a dynamic array or queue works and returns the correct value. * 2-state vectors: '0 with the element width * 4-state vectors: 'x with the element width * reals: 0.0 * strings: "" Note that the 2-state test currently still fails as out-of-bounds access on a 2-state vector incorrectly returns 'x. Signed-off-by: Lars-Peter Clausen <[email protected]>
19 lines
341 B
Verilog
19 lines
341 B
Verilog
// Check that out-of-bounds access on a 2-state vector dynamic array works and
|
|
// returns the correct value.
|
|
|
|
module test;
|
|
|
|
bit [7:0] d[];
|
|
logic [7:0] x;
|
|
|
|
initial begin
|
|
x = d[1];
|
|
if (x === 8'h00) begin
|
|
$display("PASSED");
|
|
end else begin
|
|
$display("FAILED. Expected 00000000, got %b",x);
|
|
end
|
|
end
|
|
|
|
endmodule
|