mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-03 08:25:32 +02:00
Lars-Peter Clausen
4ef5b02bcd
Check various different scenarios for array compatibility in continuous array assign. Both testing cases that should work and cases that should fail. Signed-off-by: Lars-Peter Clausen <[email protected]>
19 lines
386 B
Verilog
19 lines
386 B
Verilog
// Check that it is an error trying to continuously assign an unpacked array
|
|
// with an enum element type to another unpacked array with an element type that
|
|
// is not the same enum type, even if the two element types are the same size.
|
|
|
|
module test;
|
|
|
|
wire integer x[1:0];
|
|
enum integer {
|
|
A
|
|
} y[1:0];
|
|
|
|
assign x = y;
|
|
|
|
initial begin
|
|
$display("FAILED");
|
|
end
|
|
|
|
endmodule
|