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Lars-Peter Clausen
e1691c48fe
Check that assigning array that have opposite left-to-righto order for their dimensions have their elements assigned in reversed order. Signed-off-by: Lars-Peter Clausen <[email protected]>
22 lines
366 B
Verilog
22 lines
366 B
Verilog
// Check that continuous array assignment behaves correctly when left-to-right
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// order is reversed.
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module test;
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wire [31:0] x[1:0];
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wire [31:0] y[0:1];
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assign x[0] = 1;
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assign x[1] = 2;
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assign y = x;
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final begin
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if (y[0] === 2 || y[1] === 1) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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