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Lars-Peter Clausen
635bdd8eb8
Check that continuous assignments to unpacked net arrays preserve delay and drive strength on the generated element drivers. Signed-off-by: Lars-Peter Clausen <[email protected]>
40 lines
826 B
Verilog
40 lines
826 B
Verilog
// Check that continuous assignments to unpacked arrays preserve drive strength.
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module test;
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reg failed;
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reg [8*3-1:0] s;
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wire driven[0:1];
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wire resolved[0:1];
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assign (weak1, weak0) driven = '{1'b1, 1'b0};
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assign resolved[0] = 1'b0;
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assign resolved[1] = 1'b1;
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assign (weak1, weak0) resolved = '{1'b1, 1'b0};
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`define check_str(val, exp) begin \
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$swrite(s, "%v", val); \
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if (s != exp) begin \
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$display("FAILED(%0d). '%s' expected %s, got %s", `__LINE__, \
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`"val`", exp, s); \
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failed = 1'b1; \
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end \
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end
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initial begin
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failed = 1'b0;
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#0;
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`check_str(driven[0], "We1");
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`check_str(driven[1], "We0");
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`check_str(resolved[0], "St0");
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`check_str(resolved[1], "St1");
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if (!failed) begin
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$display("PASSED");
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end
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end
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endmodule
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