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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
13 lines
107 B
Verilog
13 lines
107 B
Verilog
module hier_ref_error();
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task my_task;
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begin:block
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end
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endtask
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initial my_task.missing = 0;
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endmodule
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