mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-03 03:23:31 +02:00
Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
41 lines
801 B
Verilog
41 lines
801 B
Verilog
/*
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* This is a simple test for the for...join_none syntax. There is a
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* fork statement to start a bunch of threads. We wait for none of
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* them and instead watch them progress with the master thread.
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*/
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module main;
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int flag;
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initial begin
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flag = 0;
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fork
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# 10 flag = 10;
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# 20 flag = 20;
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# 30 flag = 30;
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join_none
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#5 if (flag != 0) begin
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$display("FAILED -- flag=%d (s.b. 0)", flag);
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$finish;
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end
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#10 if (flag != 10) begin
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$display("FAILED -- flag=%d (s.b. 10)", flag);
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$finish;
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end
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#10 if (flag != 20) begin
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$display("FAILED -- flag=%d (s.b. 20)", flag);
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$finish;
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end
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#10 if (flag != 30) begin
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$display("FAILED -- flag=%d (s.b. 30)", flag);
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$finish;
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end
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$display("PASSED");
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end
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endmodule
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