mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-04 00:31:42 +02:00
Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
36 lines
783 B
Verilog
36 lines
783 B
Verilog
// Test unary operators in constant functions
|
|
module constfunc4();
|
|
|
|
function [7:0] LAbs(input signed [7:0] x);
|
|
LAbs = abs(x);
|
|
endfunction
|
|
|
|
function real RAbs(input real x);
|
|
RAbs = abs(x);
|
|
endfunction
|
|
|
|
localparam [7:0] ResultLAb1 = LAbs(8'sh01);
|
|
localparam [7:0] ResultLAb2 = LAbs(8'shff);
|
|
localparam real ResultRAb1 = RAbs( 2.0);
|
|
localparam real ResultRAb2 = RAbs(-2.0);
|
|
|
|
reg failed;
|
|
|
|
initial begin
|
|
failed = 0;
|
|
$display("%h", ResultLAb1);
|
|
$display("%h", ResultLAb2);
|
|
$display("%g", ResultRAb1);
|
|
$display("%g", ResultRAb2);
|
|
if (ResultLAb1 !== 8'h01) failed = 1;
|
|
if (ResultLAb2 !== 8'h01) failed = 1;
|
|
if (ResultRAb1 != 2.0) failed = 1;
|
|
if (ResultRAb2 != 2.0) failed = 1;
|
|
if (failed)
|
|
$display("FAILED");
|
|
else
|
|
$display("PASSED");
|
|
end
|
|
|
|
endmodule
|