mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-07 03:24:31 +02:00
Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
97 lines
1.3 KiB
Verilog
97 lines
1.3 KiB
Verilog
module automatic_events3();
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reg [1:0] Source;
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initial begin
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Source[0] = 1'b0;
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forever begin
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#20 Source[0] = 1'b1;
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#20 Source[0] = 1'b0;
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end
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end
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initial begin
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Source[1] = 1'b0;
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#15;
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forever begin
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#10 Source[1] = 1'bx;
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#10 Source[1] = 1'b1;
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#10 Source[1] = 1'bx;
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#10 Source[1] = 1'b0;
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end
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end
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task automatic ReportPosEdge0;
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begin
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@(posedge Source[0]);
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$display("Time %t : Source[0] rise", $time);
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end
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endtask
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task automatic ReportNegEdge0;
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begin
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@(negedge Source[0]);
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$display("Time %t : Source[0] fall", $time);
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end
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endtask
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task automatic ReportAnyEdge0;
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time t;
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begin
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@(Source[0]) t = $time;
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#1 $display("Time %t : Source[0] edge", t);
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end
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endtask
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task automatic ReportPosEdge1;
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begin
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@(posedge Source[1]);
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$display("Time %t : Source[1] rise", $time);
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end
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endtask
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task automatic ReportNegEdge1;
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begin
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@(negedge Source[1]);
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$display("Time %t : Source[1] fall", $time);
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end
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endtask
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task automatic ReportAnyEdge1;
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time t;
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begin
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@(Source[1]) t = $time;
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#1 $display("Time %t : Source[1] edge", t);
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end
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endtask
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initial begin
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#1;
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fork
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repeat(2) ReportPosEdge0;
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repeat(2) ReportNegEdge0;
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repeat(4) ReportAnyEdge0;
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repeat(4) ReportPosEdge1;
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repeat(4) ReportNegEdge1;
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repeat(8) ReportAnyEdge1;
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join
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$finish(0);
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end
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endmodule
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