493 lines
16 KiB
C
493 lines
16 KiB
C
/*
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* Copyright (c) 2026 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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# include "sys_priv.h"
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/*
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* This file implements the IEEE 1364-2005 Clause 18 Extended VCD
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* ($dumpports) task family. The port direction comes from the vpiPort
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* (vpiPortInfo) meta-data; the value-bearing net is reached through the
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* port's vpiLowConn relationship, and its per-bit drive strength is read
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* with vpiStrengthVal. The output is byte-compatible (for scalar ports)
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* with the GHDL --evcd writer so a single waveform reader works across
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* Verilog and VHDL.
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*
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* PHASE 1: scalar (1-bit) input/output/inout ports -- full pipeline
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* (header, $scope/$var/$upscope, initial checkpoint, value changes).
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* Vector ports are declared with their range but only bit 0 is dumped;
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* the full bus encoding is pinned against the GHDL reference in Phase 2.
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*/
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# include <stdio.h>
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# include <stdlib.h>
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# include <string.h>
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# include <assert.h>
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# include <time.h>
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# include "ivl_alloc.h"
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static FILE *evcd_file = NULL;
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static int evcd_no_date = 0;
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static PLI_UINT64 evcd_cur_time = 0;
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static int evcd_time_set = 0;
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static int evcd_is_off = 0;
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static int evcd_started = 0; /* initial checkpoint emitted yet? */
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static const char*units_names[] = { "s", "ms", "us", "ns", "ps", "fs" };
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/* One tracked port. */
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struct evcd_port {
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vpiHandle net; /* value net (vpiLowConn of the port) */
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int dir; /* vpiInput / vpiOutput / vpiInout */
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unsigned width;
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int id; /* EVCD identifier integer */
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struct evcd_port*next;
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};
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static struct evcd_port*evcd_list = NULL;
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static struct evcd_port*evcd_tail = NULL; /* append here to keep id order */
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static int evcd_next_id = 0;
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/* ------------------------------------------------------------------ */
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/* State-char and strength mapping (GHDL byte-compatible) */
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/* ------------------------------------------------------------------ */
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/* Map a 4-state logic value (vpi0/vpi1/vpiZ/vpiX, with vpiH/vpiL folded
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onto 1/0) and a port direction to the EVCD state character. */
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static char evcd_state_char(int logic, int dir)
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{
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int v; /* 0, 1, 2=Z, 3=X */
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switch (logic) {
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case vpi0: case vpiL: v = 0; break;
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case vpi1: case vpiH: v = 1; break;
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case vpiZ: v = 2; break;
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default: v = 3; break;
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}
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if (dir == vpiInput) {
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switch (v) { case 0: return 'D'; case 1: return 'U';
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case 2: return 'Z'; default: return 'N'; }
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} else if (dir == vpiOutput) {
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switch (v) { case 0: return 'L'; case 1: return 'H';
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case 2: return 'T'; default: return 'X'; }
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} else { /* inout / unknown direction */
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switch (v) { case 0: return '0'; case 1: return '1';
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case 2: return 'F'; default: return '?'; }
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}
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}
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/* The strength0 / strength1 components for a value, using the
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GHDL-compatible convention: a driven level is strong (6), the opposite
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rail is high-Z (0); three-state is 0/0; unknown is 6/6. */
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static void evcd_strengths(int logic, int*s0, int*s1)
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{
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switch (logic) {
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case vpi0: case vpiL: *s0 = 6; *s1 = 0; break;
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case vpi1: case vpiH: *s0 = 0; *s1 = 6; break;
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case vpiZ: *s0 = 0; *s1 = 0; break;
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default: *s0 = 6; *s1 = 6; break;
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}
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}
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/* Emit one value record for a port:
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scalar -> p<state> <s0> <s1> <<id>
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vector -> p<state...> <s0...> <s1...> <<id>
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For an N-bit port the state and each strength component carry N
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characters, most-significant bit first (matching the [msb:lsb] $var
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declaration), and the encoding is byte-compatible with GHDL --evcd. */
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static void evcd_emit_value(struct evcd_port*p)
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{
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s_vpi_value val;
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int logic, s0, s1, idx;
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val.format = vpiStrengthVal;
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vpi_get_value(p->net, &val);
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if (p->width <= 1) {
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logic = (int)val.value.strength[0].logic;
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evcd_strengths(logic, &s0, &s1);
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fprintf(evcd_file, "p%c %d %d <%d\n",
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evcd_state_char(logic, p->dir), s0, s1, p->id);
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return;
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}
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/* Bit 0 of the strength array is the LSB; emit MSB first. */
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fputc('p', evcd_file);
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for (idx = (int)p->width - 1 ; idx >= 0 ; idx -= 1)
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fputc(evcd_state_char((int)val.value.strength[idx].logic, p->dir),
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evcd_file);
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fputc(' ', evcd_file);
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for (idx = (int)p->width - 1 ; idx >= 0 ; idx -= 1) {
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evcd_strengths((int)val.value.strength[idx].logic, &s0, &s1);
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fputc('0' + s0, evcd_file);
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}
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fputc(' ', evcd_file);
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for (idx = (int)p->width - 1 ; idx >= 0 ; idx -= 1) {
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evcd_strengths((int)val.value.strength[idx].logic, &s0, &s1);
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fputc('0' + s1, evcd_file);
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}
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fprintf(evcd_file, " <%d\n", p->id);
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}
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/* ------------------------------------------------------------------ */
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/* Time + value-change callback */
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/* ------------------------------------------------------------------ */
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static PLI_UINT64 evcd_now(void)
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{
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s_vpi_time now;
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now.type = vpiSimTime;
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vpi_get_time(0, &now);
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return ((PLI_UINT64)now.high << 32) | (PLI_UINT64)now.low;
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}
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static void evcd_emit_time(PLI_UINT64 t)
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{
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if (!evcd_time_set || t != evcd_cur_time) {
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fprintf(evcd_file, "#%" PLI_UINT64_FMT "\n", t);
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evcd_cur_time = t;
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evcd_time_set = 1;
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}
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}
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static PLI_INT32 evcd_value_cb(struct t_cb_data*cb)
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{
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struct evcd_port*p = (struct evcd_port*)cb->user_data;
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/* Value changes while the design settles at the start time are
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folded into the initial checkpoint, so ignore them until it has
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been emitted (at the read-only synch of the current step). */
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if (evcd_file == NULL || evcd_is_off || !evcd_started)
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return 0;
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evcd_emit_time(evcd_now());
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evcd_emit_value(p);
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return 0;
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}
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/* ------------------------------------------------------------------ */
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/* Header */
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/* ------------------------------------------------------------------ */
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static void evcd_emit_header(void)
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{
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int prec = vpi_get(vpiTimePrecision, 0);
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unsigned scale = 1, udx = 0;
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time_t walltime;
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time(&walltime);
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assert(prec >= -15);
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while (prec < 0) { udx += 1; prec += 3; }
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while (prec > 0) { scale *= 10; prec -= 1; }
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if (!evcd_no_date) {
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fprintf(evcd_file, "$date\n\t%s$end\n",
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asctime(localtime(&walltime)));
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}
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fprintf(evcd_file, "$version\n\tIcarus Verilog\n$end\n");
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fprintf(evcd_file, "$timescale\n\t%u%s\n$end\n", scale, units_names[udx]);
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}
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/* ------------------------------------------------------------------ */
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/* Scope / port scan */
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/* ------------------------------------------------------------------ */
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static const char*evcd_dir_name(int dir)
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{
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switch (dir) {
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case vpiInput: return "input";
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case vpiOutput: return "output";
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case vpiInout: return "inout";
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default: return "?";
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}
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}
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/* Declare every port of one module instance scope: emit its $var record,
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track it, and register a value-change callback on its net. */
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static void evcd_scan_scope(vpiHandle scope)
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{
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vpiHandle ports, port;
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fprintf(evcd_file, "$scope module %s $end\n",
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vpi_get_str(vpiFullName, scope));
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ports = vpi_iterate(vpiPort, scope);
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while (ports && (port = vpi_scan(ports))) {
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struct evcd_port*p;
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s_cb_data cb;
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s_vpi_time tm;
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const char*name = vpi_get_str(vpiName, port);
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int dir = vpi_get(vpiDirection, port);
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unsigned width = vpi_get(vpiSize, port);
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vpiHandle net = vpi_handle(vpiLowConn, port);
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if (net == NULL) {
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vpi_printf("EVCD warning: port %s has no value net; "
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"skipping.\n", name ? name : "?");
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continue;
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}
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p = (struct evcd_port*)calloc(1, sizeof *p);
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p->net = net;
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p->dir = dir;
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p->width = width;
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p->id = evcd_next_id++;
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p->next = NULL;
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/* Append so checkpoints emit records in ascending id order
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(matching the GHDL --evcd writer). */
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if (evcd_tail) evcd_tail->next = p;
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else evcd_list = p;
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evcd_tail = p;
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/* $var port <size> <<id> <reference> $end. Use the port's
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actual declared [msb:lsb] range when it is a vector. */
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if (width > 1 || vpi_get(vpiLeftRange, net) != 0)
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fprintf(evcd_file, "$var port [%d:%d] <%d %s $end\n",
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(int)vpi_get(vpiLeftRange, net),
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(int)vpi_get(vpiRightRange, net), p->id, name);
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else
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fprintf(evcd_file, "$var port 1 <%d %s $end\n", p->id, name);
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/* Track value changes on the port's value net. */
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memset(&cb, 0, sizeof cb);
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tm.type = vpiSimTime;
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cb.reason = cbValueChange;
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cb.cb_rtn = evcd_value_cb;
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cb.obj = net;
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cb.time = &tm;
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cb.value = NULL;
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cb.user_data = (PLI_BYTE8*)p;
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vpi_register_cb(&cb);
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(void)evcd_dir_name; /* reserved for diagnostics */
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}
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fprintf(evcd_file, "$upscope $end\n");
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}
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/* Dump the current value of every tracked port (checkpoint). */
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static void evcd_checkpoint(void)
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{
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struct evcd_port*p;
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for (p = evcd_list ; p ; p = p->next)
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evcd_emit_value(p);
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}
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/* ------------------------------------------------------------------ */
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/* End of simulation */
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/* ------------------------------------------------------------------ */
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static PLI_INT32 evcd_end_cb(struct t_cb_data*cb)
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{
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(void)cb;
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if (evcd_file) {
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fprintf(evcd_file, "#%" PLI_UINT64_FMT "\n", evcd_now());
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fflush(evcd_file);
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}
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return 0;
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}
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/* The initial checkpoint, deferred to the read-only synch of the start
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time so it records settled values: #<t> $dumpports <values> $end. */
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static PLI_INT32 evcd_initial_cb(struct t_cb_data*cb)
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{
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(void)cb;
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if (evcd_file == NULL)
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return 0;
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evcd_cur_time = evcd_now();
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evcd_time_set = 1;
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fprintf(evcd_file, "#%" PLI_UINT64_FMT "\n$dumpports\n", evcd_cur_time);
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evcd_checkpoint();
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fprintf(evcd_file, "$end\n");
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evcd_started = 1;
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return 0;
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}
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/* ------------------------------------------------------------------ */
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/* $dumpports */
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/* ------------------------------------------------------------------ */
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static PLI_INT32 sys_dumpports_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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vpiHandle systf, argv, arg;
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vpiHandle scopes[64];
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unsigned nscopes = 0;
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char*path = NULL;
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s_cb_data cb;
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unsigned i;
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(void)name;
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if (evcd_file != NULL) {
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vpi_printf("EVCD warning: $dumpports already active; ignored.\n");
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return 0;
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}
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systf = vpi_handle(vpiSysTfCall, 0);
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argv = vpi_iterate(vpiArgument, systf);
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/* Arguments are module instances to dump plus, optionally, a
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trailing file name (string). Anything that is not a module is
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treated as the file-name expression. */
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while (argv && (arg = vpi_scan(argv))) {
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if (vpi_get(vpiType, arg) == vpiModule) {
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if (nscopes < 64)
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scopes[nscopes++] = arg;
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} else if (path == NULL) {
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s_vpi_value v;
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v.format = vpiStringVal;
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vpi_get_value(arg, &v);
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if (v.value.str && v.value.str[0])
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path = strdup(v.value.str);
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}
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}
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/* Default scope = the module containing the call; default file. */
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if (nscopes == 0) {
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vpiHandle sc = vpi_handle(vpiScope, systf);
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if (sc) scopes[nscopes++] = sc;
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}
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if (path == NULL)
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path = strdup("dumpports.vcd");
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evcd_file = fopen(path, "w");
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if (evcd_file == NULL) {
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vpi_printf("EVCD error: cannot open %s for output.\n", path);
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free(path);
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return 0;
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}
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vpi_printf("EVCD info: dumpports file %s opened for output.\n", path);
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free(path);
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evcd_emit_header();
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for (i = 0 ; i < nscopes ; i += 1)
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evcd_scan_scope(scopes[i]);
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fprintf(evcd_file, "$enddefinitions $end\n");
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/* Defer the initial checkpoint to the read-only synch of the
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current time so it captures settled values. */
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{
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s_vpi_time tm;
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tm.type = vpiSimTime;
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tm.high = 0;
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tm.low = 0;
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memset(&cb, 0, sizeof cb);
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cb.reason = cbReadOnlySynch;
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cb.cb_rtn = evcd_initial_cb;
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cb.time = &tm;
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cb.obj = NULL;
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vpi_register_cb(&cb);
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}
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/* Close the file cleanly at the end of simulation. */
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memset(&cb, 0, sizeof cb);
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cb.reason = cbEndOfSimulation;
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cb.cb_rtn = evcd_end_cb;
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cb.obj = NULL;
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vpi_register_cb(&cb);
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return 0;
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}
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/* $dumpportsall: force a checkpoint of all port values now. */
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static PLI_INT32 sys_dumpportsall_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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(void)name;
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if (evcd_file == NULL) return 0;
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evcd_emit_time(evcd_now());
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evcd_checkpoint();
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return 0;
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}
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/* $dumpportsoff / $dumpportson: suspend / resume dumping. */
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static PLI_INT32 sys_dumpportsoff_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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struct evcd_port*p;
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(void)name;
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if (evcd_file == NULL || evcd_is_off) return 0;
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evcd_emit_time(evcd_now());
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/* Checkpoint every bit of every port as X while suspended. */
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for (p = evcd_list ; p ; p = p->next) {
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int s0, s1;
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unsigned b;
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char c = evcd_state_char(vpiX, p->dir);
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evcd_strengths(vpiX, &s0, &s1);
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fputc('p', evcd_file);
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for (b = 0 ; b < p->width ; b += 1) fputc(c, evcd_file);
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fputc(' ', evcd_file);
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for (b = 0 ; b < p->width ; b += 1) fputc('0' + s0, evcd_file);
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fputc(' ', evcd_file);
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for (b = 0 ; b < p->width ; b += 1) fputc('0' + s1, evcd_file);
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fprintf(evcd_file, " <%d\n", p->id);
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}
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evcd_is_off = 1;
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return 0;
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}
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static PLI_INT32 sys_dumpportson_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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(void)name;
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if (evcd_file == NULL || !evcd_is_off) return 0;
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evcd_is_off = 0;
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evcd_emit_time(evcd_now());
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evcd_checkpoint();
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return 0;
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}
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/* $dumpportsflush: flush the output buffer. */
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static PLI_INT32 sys_dumpportsflush_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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(void)name;
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if (evcd_file) fflush(evcd_file);
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return 0;
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}
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/* $dumpportslimit(size [, file]): accepted for compatibility. The
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file-size cap is not enforced in Phase 1. */
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static PLI_INT32 sys_dumpportslimit_calltf(ICARUS_VPI_CONST PLI_BYTE8*name)
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{
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(void)name;
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return 0;
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}
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/* ------------------------------------------------------------------ */
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/* Registration */
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/* ------------------------------------------------------------------ */
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static void register_evcd_task(const char*tfname,
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PLI_INT32 (*calltf)(ICARUS_VPI_CONST PLI_BYTE8*))
|
|
{
|
|
s_vpi_systf_data tf;
|
|
memset(&tf, 0, sizeof tf);
|
|
tf.type = vpiSysTask;
|
|
tf.tfname = (PLI_BYTE8*)tfname;
|
|
tf.calltf = calltf;
|
|
tf.compiletf = NULL;
|
|
tf.sizetf = NULL;
|
|
tf.user_data = (PLI_BYTE8*)tfname;
|
|
vpi_register_systf(&tf);
|
|
}
|
|
|
|
void sys_evcd_register(void)
|
|
{
|
|
register_evcd_task("$dumpports", sys_dumpports_calltf);
|
|
register_evcd_task("$dumpportsall", sys_dumpportsall_calltf);
|
|
register_evcd_task("$dumpportsoff", sys_dumpportsoff_calltf);
|
|
register_evcd_task("$dumpportson", sys_dumpportson_calltf);
|
|
register_evcd_task("$dumpportsflush", sys_dumpportsflush_calltf);
|
|
register_evcd_task("$dumpportslimit", sys_dumpportslimit_calltf);
|
|
}
|