31 lines
778 B
ReStructuredText
31 lines
778 B
ReStructuredText
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The stub Code Generator (-tstub)
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================================
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The stub code generator is a debugging aid for the Icarus Verilog compiler
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itself. It outputs a text dump of the elaborated design as it is passed to
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code generators.
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Example command::
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% iverilog -o stub.txt -tstub -s top input.v
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With this example code:
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.. code-block:: verilog
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module top;
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initial $display("Hello World!");
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endmodule
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The resulting `stub.txt` will contain::
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root module = top
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scope: top (0 parameters, 0 signals, 0 logic) module top time units = 1e0
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time precision = 1e0
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end scope top
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# There are 0 constants detected
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initial
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Call $display(1 parameters); /* hello_world.v:2 */
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<string="Hello World!", width=96, type=bool>
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